mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 23:47:24 +00:00
e7c831543a
By default, it is assumed that the UTMI clock is generated from a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ field of the SFR_UTMICKTRIM has to be updated to generate the UTMI clock in the proper way. The UTMI clock has a fixed rate of 480 MHz. In fact, there is no multiplier we can configure. The multiplier is managed internally, depending on the reference clock frequency, to achieve the target of 480 MHz. The patch is cloned from the patch of mailing-list: [PATCH v2] clk: at91: utmi: set the mainck rate Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> [trini: Depend on SPL_DM] Signed-off-by: Tom Rini <trini@konsulko.com>
24 lines
534 B
C
24 lines
534 B
C
/*
|
|
* Copyright (C) 2016 Atmel Corporation
|
|
* Wenyou.Yang <wenyou.yang@atmel.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __AT91_PMC_H__
|
|
#define __AT91_PMC_H__
|
|
|
|
#include <regmap.h>
|
|
|
|
struct pmc_platdata {
|
|
struct at91_pmc *reg_base;
|
|
struct regmap *regmap_sfr;
|
|
};
|
|
|
|
int at91_pmc_core_probe(struct udevice *dev);
|
|
int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name);
|
|
|
|
int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args);
|
|
int at91_clk_probe(struct udevice *dev);
|
|
|
|
#endif
|