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https://github.com/AsahiLinux/u-boot
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fec6d9ee7c
Use CONFIG_OF_LIBFDT instead to support flattened device trees. It is cleaner, has better functionality, and is better supported. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
320 lines
6.8 KiB
C
320 lines
6.8 KiB
C
/*
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* (C) Copyright 2001
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* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* cpu.c
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*
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* CPU specific code
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*
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* written or collected and sometimes rewritten by
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* Magnus Damm <damm@bitsmart.com>
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*
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* minor modifications by
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* Wolfgang Denk <wd@denx.de>
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*
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* more modifications by
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* Josh Huber <huber@mclx.com>
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* added support for the 74xx series of cpus
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* added support for the 7xx series of cpus
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* made the code a little less hard-coded, and more auto-detectish
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*/
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#include <common.h>
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#include <command.h>
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#include <74xx_7xx.h>
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#include <asm/cache.h>
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#if defined(CONFIG_OF_LIBFDT)
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#include <libfdt.h>
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#include <fdt_support.h>
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#endif
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#ifdef CONFIG_AMIGAONEG3SE
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#include "../board/MAI/AmigaOneG3SE/via686.h"
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#include "../board/MAI/AmigaOneG3SE/memio.h"
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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cpu_t
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get_cpu_type(void)
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{
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uint pvr = get_pvr();
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cpu_t type;
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type = CPU_UNKNOWN;
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switch (PVR_VER(pvr)) {
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case 0x000c:
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type = CPU_7400;
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break;
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case 0x0008:
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type = CPU_750;
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if (((pvr >> 8) & 0xff) == 0x01) {
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type = CPU_750CX; /* old CX (80100 and 8010x?)*/
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} else if (((pvr >> 8) & 0xff) == 0x22) {
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type = CPU_750CX; /* CX (82201,82202) and CXe (82214) */
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} else if (((pvr >> 8) & 0xff) == 0x33) {
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type = CPU_750CX; /* CXe (83311) */
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} else if (((pvr >> 12) & 0xF) == 0x3) {
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type = CPU_755;
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}
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break;
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case 0x7000:
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type = CPU_750FX;
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break;
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case 0x7002:
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type = CPU_750GX;
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break;
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case 0x800C:
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type = CPU_7410;
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break;
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case 0x8000:
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type = CPU_7450;
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break;
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case 0x8001:
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type = CPU_7455;
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break;
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case 0x8002:
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type = CPU_7457;
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break;
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case 0x8003:
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type = CPU_7447A;
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break;
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case 0x8004:
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type = CPU_7448;
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break;
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default:
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break;
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}
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return type;
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}
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/* ------------------------------------------------------------------------- */
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#if !defined(CONFIG_BAB7xx)
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int checkcpu (void)
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{
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uint type = get_cpu_type();
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uint pvr = get_pvr();
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ulong clock = gd->cpu_clk;
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char buf[32];
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char *str;
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puts ("CPU: ");
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switch (type) {
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case CPU_750CX:
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printf ("750CX%s v%d.%d", (pvr&0xf0)?"e":"",
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(pvr>>8) & 0xf,
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pvr & 0xf);
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goto PR_CLK;
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case CPU_750:
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str = "750";
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break;
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case CPU_750FX:
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str = "750FX";
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break;
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case CPU_750GX:
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str = "750GX";
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break;
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case CPU_755:
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str = "755";
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break;
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case CPU_7400:
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str = "MPC7400";
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break;
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case CPU_7410:
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str = "MPC7410";
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break;
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case CPU_7447A:
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str = "MPC7447A";
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break;
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case CPU_7448:
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str = "MPC7448";
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break;
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case CPU_7450:
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str = "MPC7450";
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break;
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case CPU_7455:
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str = "MPC7455";
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break;
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case CPU_7457:
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str = "MPC7457";
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break;
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default:
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printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
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return -1;
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}
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printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
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PR_CLK:
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printf (" @ %s MHz\n", strmhz(buf, clock));
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return (0);
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}
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#endif
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/* these two functions are unimplemented currently [josh] */
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/* -------------------------------------------------------------------- */
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/* L1 i-cache */
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int
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checkicache(void)
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{
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return 0; /* XXX */
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}
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/* -------------------------------------------------------------------- */
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/* L1 d-cache */
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int
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checkdcache(void)
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{
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return 0; /* XXX */
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}
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/* -------------------------------------------------------------------- */
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static inline void
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soft_restart(unsigned long addr)
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{
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/* SRR0 has system reset vector, SRR1 has default MSR value */
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/* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
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__asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
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__asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
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__asm__ __volatile__ ("mtspr 27, 4");
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__asm__ __volatile__ ("rfi");
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while(1); /* not reached */
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}
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#if !defined(CONFIG_PCIPPC2) && \
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!defined(CONFIG_BAB7xx) && \
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!defined(CONFIG_ELPPC) && \
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!defined(CONFIG_PPMC7XX)
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/* no generic way to do board reset. simply call soft_reset. */
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void
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do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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ulong addr;
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/* flush and disable I/D cache */
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__asm__ __volatile__ ("mfspr 3, 1008" ::: "r3");
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__asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5");
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__asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4");
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__asm__ __volatile__ ("andc 5, 3, 5" ::: "r5");
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__asm__ __volatile__ ("sync");
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__asm__ __volatile__ ("mtspr 1008, 4");
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__asm__ __volatile__ ("isync");
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__asm__ __volatile__ ("sync");
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__asm__ __volatile__ ("mtspr 1008, 5");
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__asm__ __volatile__ ("isync");
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__asm__ __volatile__ ("sync");
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#ifdef CFG_RESET_ADDRESS
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addr = CFG_RESET_ADDRESS;
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#else
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/*
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* note: when CFG_MONITOR_BASE points to a RAM address,
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* CFG_MONITOR_BASE - sizeof (ulong) is usually a valid
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* address. Better pick an address known to be invalid on your
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* system and assign it to CFG_RESET_ADDRESS.
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*/
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addr = CFG_MONITOR_BASE - sizeof (ulong);
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#endif
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soft_restart(addr);
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while(1); /* not reached */
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}
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#endif
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/* ------------------------------------------------------------------------- */
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/*
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* For the 7400 the TB clock runs at 1/4 the cpu bus speed.
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*/
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#if defined(CONFIG_AMIGAONEG3SE) || defined(CFG_CONFIG_BUS_CLK)
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unsigned long get_tbclk(void)
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{
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return (gd->bus_clk / 4);
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}
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#else /* ! CONFIG_AMIGAONEG3SE and !CFG_CONFIG_BUS_CLK*/
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unsigned long get_tbclk (void)
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{
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return CFG_BUS_HZ / 4;
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}
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#endif /* CONFIG_AMIGAONEG3SE or CFG_CONFIG_BUS_CLK*/
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/* ------------------------------------------------------------------------- */
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#if defined(CONFIG_WATCHDOG)
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#if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
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void
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watchdog_reset(void)
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{
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}
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#endif /* !CONFIG_PCIPPC2 && !CONFIG_BAB7xx */
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#endif /* CONFIG_WATCHDOG */
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/* ------------------------------------------------------------------------- */
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#ifdef CONFIG_OF_LIBFDT
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"timebase-frequency", bd->bi_busfreq / 4, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"clock-frequency", bd->bi_intfreq, 1);
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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fdt_fixup_ethernet(blob, bd);
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}
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#endif
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/* ------------------------------------------------------------------------- */
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