Diego Rondini e7c15b7ab8 sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2 ... Orangepi Zero Plus 2 is an open-source single-board computer, available in two Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the H5 is already supported. H3 Orangepi Zero Plus 2 has: - Quad-core Cortex-A7 - 512MB DDR3 - microSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG + power supply Sync dts from linux v5.2 commit: "ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry" (sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b) Commit: "ARM: dts: sun8i: h3: Refactor the pinctrl node names" (sha1: a4dc791974e568a15f7f37131729b1a6912f4811) has been avoided as it breaks U-Boot build. Signed-off-by: Diego Rondini <diego.rondini@kynetics.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>		2019-12-18 20:14:16 +05:30
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arc	common: Move enable/disable_interrupts out of common.h	2019-12-02 18:25:01 -05:00
arm	sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2	2019-12-18 20:14:16 +05:30
m68k	common: Move trap_init() out of common.h	2019-12-02 18:25:25 -05:00
microblaze	common: Move enable/disable_interrupts out of common.h	2019-12-02 18:25:01 -05:00
mips	Merge branch '2019-12-02-master-imports'	2019-12-02 22:05:35 -05:00
nds32	common: Move enable/disable_interrupts out of common.h	2019-12-02 18:25:01 -05:00
nios2	common: Move enable/disable_interrupts out of common.h	2019-12-02 18:25:01 -05:00
powerpc	common: Move some board functions out of common.h	2019-12-02 18:25:21 -05:00
riscv	riscv: add option to wait for ack from secondary harts in smp functions	2019-12-10 08:23:10 +08:00
sandbox	common: Move command functions out of common.h	2019-12-02 18:25:02 -05:00
sh	common: Move enable/disable_interrupts out of common.h	2019-12-02 18:25:01 -05:00
x86	x86: simplify ljmp to 32-bit code	2019-12-08 19:10:21 +08:00
xtensa	common: Move interrupt functions into a new header	2019-12-02 18:25:00 -05:00
.gitignore
Kconfig	sh: r2dplus: Enable OF control	2019-09-02 17:38:43 +02:00