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e7b860fa4d
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
6 lines
163 B
Text
6 lines
163 B
Text
Colibri VFxx
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M: Stefan Agner <stefan.agner@toradex.com>
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S: Maintained
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F: board/toradex/colibri_vf/
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F: include/configs/colibri_vf.h
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F: configs/colibri_vf_defconfig
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