mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
ea99d227f9
Currently, only the first MAC address is read from the fuses. The second MAC address is not read and Linux assigns a random one. To prevent this behavior, read the second MAC address from the fuses and store it into the eth1addr environment variable so that it can be passed to Linux. Signed-off-by: Fabio Estevam <festevam@denx.de>
128 lines
2.7 KiB
C
128 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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// Copyright (C) 2021 Fabio Estevam <festevam@denx.de>
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#include <init.h>
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#include <net.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx7-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/hab.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/io.h>
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#include <common.h>
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#include <env.h>
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#include <env_internal.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/setup.h>
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#include <asm/bootm.h>
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#include <mmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
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PAD_CTL_HYS)
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int dram_init(void)
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{
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gd->ram_size = PHYS_SDRAM_SIZE;
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return 0;
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}
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static iomux_v3_cfg_t const wdog_pads[] = {
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MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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};
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static int setup_fec(void)
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{
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struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs =
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(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
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int ret;
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/* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/
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clrsetbits_le32(&iomuxc_gpr_regs->gpr[1],
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(IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK |
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IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0);
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ret = set_clk_enet(ENET_125MHZ);
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if (ret)
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return ret;
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return 0;
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}
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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setup_fec();
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
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unsigned char eth1addr[6];
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imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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set_wdog_reset(wdog);
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/*
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* Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
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* since we use PMIC_PWRON to reset the board.
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*/
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clrsetbits_le16(&wdog->wcr, 0, 0x10);
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/* Get the second MAC address */
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imx_get_mac_from_fuse(1, eth1addr);
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if (!env_get("eth1addr") && is_valid_ethaddr(eth1addr))
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eth_env_set_enetaddr("eth1addr", eth1addr);
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return 0;
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}
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uint board_mmc_get_env_part(struct mmc *mmc)
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{
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uint part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
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if (part == 7)
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part = 0;
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return part;
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}
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enum env_location env_get_location(enum env_operation op, int prio)
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{
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if (op == ENVOP_SAVE || op == ENVOP_ERASE)
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return ENVL_MMC;
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switch (prio) {
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case 0:
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return ENVL_NOWHERE;
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case 1:
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return ENVL_MMC;
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}
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return ENVL_UNKNOWN;
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}
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