mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
c45568cc4e
This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com>
123 lines
3 KiB
Text
123 lines
3 KiB
Text
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=12500000
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CONFIG_TARGET_LS1021AQDS=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_LEN=0x1002000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0x300000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
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CONFIG_SPL_TEXT_BASE=0x10000000
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_SYS_LOAD_ADDR=0x82000000
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CONFIG_AHCI=y
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CONFIG_LAYERSCAPE_NS_ACCESS=y
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CONFIG_PCIE1=y
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CONFIG_PCIE2=y
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CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_FSL_QIXIS=y
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CONFIG_SYS_MEMTEST_START=0x80000000
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CONFIG_SYS_MEMTEST_END=0x9fffffff
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_RAMBOOT_PBL=y
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CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
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CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg"
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CONFIG_SD_BOOT=y
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CONFIG_SD_BOOT_QSPI=y
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CONFIG_BOOTDELAY=3
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CONFIG_SILENT_CONSOLE=y
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_MISC_INIT_R=y
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CONFIG_ID_EEPROM=y
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CONFIG_SPL_MAX_SIZE=0x1a000
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CONFIG_SPL_PAD_TO=0x1c000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x80100000
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CONFIG_SPL_BSS_MAX_SIZE=0x80000
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CONFIG_SPL_FSL_PBL=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0x1001d000
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CONFIG_SYS_SPL_MALLOC=y
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CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
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CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x820c0000
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_SPL_WATCHDOG=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=276
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CONFIG_CMD_BOOTZ=y
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CONFIG_SYS_BOOTM_LEN=0x4000000
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CONFIG_CMD_GREPENV=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="eTSEC1"
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CONFIG_DM=y
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CONFIG_SATA=y
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CONFIG_SATA_CEVA=y
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CONFIG_FSL_CAAM=y
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_DDR_ECC=y
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CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
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CONFIG_SYS_DDR_RAW_TIMING=y
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CONFIG_MPC8XXX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x57
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_NVME_PCI=y
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CONFIG_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_LAYERSCAPE_RC=y
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CONFIG_DM_SCSI=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_FSL_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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