mirror of
https://github.com/AsahiLinux/u-boot
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82778e92c2
Enable USB0 clock by resetting bit 20 of MSTPCR2. Leave other bits unchanged. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
109 lines
2.2 KiB
C
109 lines
2.2 KiB
C
/*
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* Copyright (C) 2009, 2011 Renesas Solutions Corp.
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* Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
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* Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <i2c.h>
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#include <netdev.h>
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/* USB power management register */
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#define UPONCR0 0xA40501D4
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int checkboard(void)
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{
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puts("BOARD: ecovec\n");
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return 0;
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}
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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return 0;
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}
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static void debug_led(u8 led)
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{
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/* PDGR[0-4] is debug LED */
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outb((inb(PGDR) & ~0x0F) | (led & 0x0F), PGDR);
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}
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int board_late_init(void)
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{
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u8 mac[6];
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char env_mac[17];
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udelay(1000);
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/* SH-Eth (PLCR, PNCR, PXCR, PSELx )*/
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outw(inw(PLCR) & ~0xFFF0, PLCR);
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outw(inw(PNCR) & ~0x000F, PNCR);
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outw(inw(PXCR) & ~0x0FC0, PXCR);
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outw((inw(PSELB) & ~0x030F) | 0x020A, PSELB);
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outw((inw(PSELC) & ~0x0307) | 0x0207, PSELC);
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outw((inw(PSELE) & ~0x00c0) | 0x0080, PSELE);
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debug_led(1 << 3);
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outl(inl(MSTPCR2) & ~0x10000000, MSTPCR2);
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i2c_set_bus_num(1); /* Use I2C 1 */
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/* Read MAC address */
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i2c_read(0x50, 0x10, 0, mac, 6);
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/* Set MAC address */
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sprintf(env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
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mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
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setenv("ethaddr", env_mac);
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debug_led(0x0F);
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return 0;
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}
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int board_init(void)
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{
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/* LED (PTG) */
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outw((inw(PGCR) & ~0xFF) | 0x55, PGCR);
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outw((inw(HIZCRA) & ~0x02), HIZCRA);
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debug_led(1 << 0);
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/* SCIF0 (PTF, PTM) */
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outw(inw(PFCR) & ~0x30, PFCR);
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outw(inw(PMCR) & ~0x0C, PMCR);
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outw((inw(PSELA) & ~0x40) | 0x40, PSELA);
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debug_led(1 << 1);
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/* RMII (PTA) */
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outw((inw(PACR) & ~0x0C) | 0x04, PACR);
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outb((inb(PADR) & ~0x02) | 0x02, PADR);
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debug_led(1 << 2);
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/* USB host */
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outw((inw(PBCR) & ~0x300) | 0x100, PBCR);
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outb((inb(PBDR) & ~0x10) | 0x10, PBDR);
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outl(inl(MSTPCR2) & ~0x100000, MSTPCR2);
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outw(0x0600, UPONCR0);
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debug_led(1 << 3);
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/* debug switch */
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outw((inw(PVCR) & ~0x03) | 0x02 , PVCR);
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return 0;
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}
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