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051de9b3eb
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common to support new numbe of pins and remove any platform dependency from mscc-common. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
186 lines
4.1 KiB
C
186 lines
4.1 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Microsemi SoCs pinctrl driver
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*
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* Author: <gregory.clement@bootlin.com>
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* License: Dual MIT/GPL
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* Copyright (c) 2018 Microsemi Corporation
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*/
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#include <common.h>
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#include <config.h>
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <dm/pinctrl.h>
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#include <dm/root.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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#include <asm/system.h>
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#include "mscc-common.h"
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enum {
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FUNC_NONE,
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FUNC_GPIO,
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FUNC_SIO,
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FUNC_TACHO,
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FUNC_TWI,
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FUNC_PHY_LED,
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FUNC_EXT_IRQ,
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FUNC_SFP,
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FUNC_SI,
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FUNC_PWM,
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FUNC_UART,
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FUNC_MAX
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};
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static char * const luton_function_names[] = {
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[FUNC_NONE] = "none",
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[FUNC_GPIO] = "gpio",
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[FUNC_SIO] = "sio",
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[FUNC_TACHO] = "tacho",
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[FUNC_TWI] = "twi",
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[FUNC_PHY_LED] = "phy_led",
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[FUNC_EXT_IRQ] = "ext_irq",
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[FUNC_SFP] = "sfp",
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[FUNC_SI] = "si",
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[FUNC_PWM] = "pwm",
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[FUNC_UART] = "uart",
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};
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MSCC_P(0, SIO, NONE, NONE);
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MSCC_P(1, SIO, NONE, NONE);
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MSCC_P(2, SIO, NONE, NONE);
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MSCC_P(3, SIO, NONE, NONE);
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MSCC_P(4, TACHO, NONE, NONE);
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MSCC_P(5, TWI, PHY_LED, NONE);
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MSCC_P(6, TWI, PHY_LED, NONE);
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MSCC_P(7, NONE, PHY_LED, NONE);
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MSCC_P(8, EXT_IRQ, PHY_LED, NONE);
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MSCC_P(9, EXT_IRQ, PHY_LED, NONE);
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MSCC_P(10, SFP, PHY_LED, NONE);
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MSCC_P(11, SFP, PHY_LED, NONE);
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MSCC_P(12, SFP, PHY_LED, NONE);
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MSCC_P(13, SFP, PHY_LED, NONE);
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MSCC_P(14, SI, PHY_LED, NONE);
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MSCC_P(15, SI, PHY_LED, NONE);
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MSCC_P(16, SI, PHY_LED, NONE);
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MSCC_P(17, SFP, PHY_LED, NONE);
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MSCC_P(18, SFP, PHY_LED, NONE);
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MSCC_P(19, SFP, PHY_LED, NONE);
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MSCC_P(20, SFP, PHY_LED, NONE);
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MSCC_P(21, SFP, PHY_LED, NONE);
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MSCC_P(22, SFP, PHY_LED, NONE);
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MSCC_P(23, SFP, PHY_LED, NONE);
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MSCC_P(24, SFP, PHY_LED, NONE);
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MSCC_P(25, SFP, PHY_LED, NONE);
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MSCC_P(26, SFP, PHY_LED, NONE);
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MSCC_P(27, SFP, PHY_LED, NONE);
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MSCC_P(28, SFP, PHY_LED, NONE);
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MSCC_P(29, PWM, NONE, NONE);
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MSCC_P(30, UART, NONE, NONE);
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MSCC_P(31, UART, NONE, NONE);
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#define LUTON_PIN(n) { \
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.name = "GPIO_"#n, \
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.drv_data = &mscc_pin_##n \
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}
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static const struct mscc_pin_data luton_pins[] = {
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LUTON_PIN(0),
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LUTON_PIN(1),
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LUTON_PIN(2),
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LUTON_PIN(3),
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LUTON_PIN(4),
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LUTON_PIN(5),
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LUTON_PIN(6),
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LUTON_PIN(7),
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LUTON_PIN(8),
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LUTON_PIN(9),
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LUTON_PIN(10),
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LUTON_PIN(11),
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LUTON_PIN(12),
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LUTON_PIN(13),
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LUTON_PIN(14),
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LUTON_PIN(15),
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LUTON_PIN(16),
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LUTON_PIN(17),
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LUTON_PIN(18),
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LUTON_PIN(19),
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LUTON_PIN(20),
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LUTON_PIN(21),
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LUTON_PIN(22),
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LUTON_PIN(23),
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LUTON_PIN(24),
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LUTON_PIN(25),
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LUTON_PIN(26),
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LUTON_PIN(27),
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LUTON_PIN(28),
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LUTON_PIN(29),
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LUTON_PIN(30),
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LUTON_PIN(31),
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};
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static const unsigned long luton_gpios[] = {
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[MSCC_GPIO_OUT_SET] = 0x00,
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[MSCC_GPIO_OUT_CLR] = 0x04,
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[MSCC_GPIO_OUT] = 0x08,
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[MSCC_GPIO_IN] = 0x0c,
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[MSCC_GPIO_OE] = 0x10,
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[MSCC_GPIO_INTR] = 0x14,
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[MSCC_GPIO_INTR_ENA] = 0x18,
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[MSCC_GPIO_INTR_IDENT] = 0x1c,
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[MSCC_GPIO_ALT0] = 0x20,
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[MSCC_GPIO_ALT1] = 0x24,
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};
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static int luton_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv;
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uc_priv = dev_get_uclass_priv(dev);
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uc_priv->bank_name = "luton-gpio";
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uc_priv->gpio_count = ARRAY_SIZE(luton_pins);
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return 0;
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}
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static struct driver luton_gpio_driver = {
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.name = "luton-gpio",
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.id = UCLASS_GPIO,
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.probe = luton_gpio_probe,
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.ops = &mscc_gpio_ops,
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};
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int luton_pinctrl_probe(struct udevice *dev)
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{
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int ret;
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ret = mscc_pinctrl_probe(dev, FUNC_MAX, luton_pins,
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ARRAY_SIZE(luton_pins), luton_function_names,
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luton_gpios);
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if (ret)
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return ret;
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ret = device_bind(dev, &luton_gpio_driver, "luton-gpio", NULL,
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dev_of_offset(dev), NULL);
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return 0;
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}
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static const struct udevice_id luton_pinctrl_of_match[] = {
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{.compatible = "mscc,luton-pinctrl"},
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{},
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};
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U_BOOT_DRIVER(luton_pinctrl) = {
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.name = "luton-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = of_match_ptr(luton_pinctrl_of_match),
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.probe = luton_pinctrl_probe,
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.priv_auto_alloc_size = sizeof(struct mscc_pinctrl),
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.ops = &mscc_pinctrl_ops,
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};
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