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855ffdfa65
Nexus 7 is a mini tablet computer co-developed by Google and Asus that runs the Android operating system. The Nexus 7 features a 7" display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB of internal storage. This patch brings support for all 3 known ASUS/Google devices: - Nexus 7 (2012) E1565 - Nexus 7 (2012) PM269 - Nexus 7 (2012) 3G - tilapia Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS Grouper E1565 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
202 lines
4.5 KiB
C
202 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010-2013
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* NVIDIA Corporation <www.nvidia.com>
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*
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* (C) Copyright 2021
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* Svyatoslav Ryhel <clamor95@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <i2c.h>
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#include <log.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/gp_padctrl.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch-tegra/fuse.h>
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#include <asm/gpio.h>
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#include <linux/delay.h>
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#include "pinmux-config-grouper.h"
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#define TPS65911_I2C_ADDRESS 0x2D
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#define TPS65911_REG_LDO1 0x30
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#define TPS65911_REG_DEVCTRL 0x3F
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#define DEVCTRL_PWR_OFF_MASK BIT(7)
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#define DEVCTRL_DEV_ON_MASK BIT(2)
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#define DEVCTRL_DEV_OFF_MASK BIT(0)
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#define MAX77663_I2C_ADDRESS 0x3C
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#define MAX77663_REG_SD2 0x18
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#define MAX77663_REG_LDO3 0x29
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#define MAX77663_REG_ONOFF_CFG1 0x41
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#define ONOFF_PWR_OFF BIT(1)
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#ifdef CONFIG_CMD_POWEROFF
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#ifdef CONFIG_GROUPER_TPS65911
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int do_poweroff(struct cmd_tbl *cmdtp,
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int flag, int argc, char *const argv[])
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{
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struct udevice *dev;
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uchar data_buffer[1];
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int ret;
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ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
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if (ret) {
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log_debug("cannot find PMIC I2C chip\n");
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return 0;
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}
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ret = dm_i2c_read(dev, TPS65911_REG_DEVCTRL, data_buffer, 1);
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if (ret)
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return ret;
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data_buffer[0] |= DEVCTRL_PWR_OFF_MASK;
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ret = dm_i2c_write(dev, TPS65911_REG_DEVCTRL, data_buffer, 1);
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if (ret)
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return ret;
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data_buffer[0] |= DEVCTRL_DEV_OFF_MASK;
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data_buffer[0] &= ~DEVCTRL_DEV_ON_MASK;
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ret = dm_i2c_write(dev, TPS65911_REG_DEVCTRL, data_buffer, 1);
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if (ret)
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return ret;
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// wait some time and then print error
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mdelay(5000);
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printf("Failed to power off!!!\n");
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return 1;
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}
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#endif /* CONFIG_GROUPER_TPS65911 */
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#ifdef CONFIG_GROUPER_MAX77663
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int do_poweroff(struct cmd_tbl *cmdtp,
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int flag, int argc, char *const argv[])
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{
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struct udevice *dev;
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uchar data_buffer[1];
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int ret;
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ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDRESS, 1, &dev);
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if (ret) {
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log_debug("cannot find PMIC I2C chip\n");
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return 0;
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}
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ret = dm_i2c_read(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1);
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if (ret)
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return ret;
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data_buffer[0] |= ONOFF_PWR_OFF;
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ret = dm_i2c_write(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1);
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if (ret)
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return ret;
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// wait some time and then print error
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mdelay(5000);
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printf("Failed to power off!!!\n");
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return 1;
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}
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#endif /* CONFIG_GROUPER_MAX77663 */
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#endif /* CONFIG_CMD_POWEROFF */
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_config_pingrp_table(grouper_pinmux_common,
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ARRAY_SIZE(grouper_pinmux_common));
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pinmux_config_drvgrp_table(grouper_padctrl,
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ARRAY_SIZE(grouper_padctrl));
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}
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#ifdef CONFIG_MMC_SDHCI_TEGRA
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static void __maybe_unused tps65911_voltage_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
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if (ret) {
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log_debug("cannot find PMIC I2C chip\n");
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return;
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}
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/* TPS659110: LDO1_REG = 3.3v, ACTIVE to SDMMC4 */
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ret = dm_i2c_reg_write(dev, TPS65911_REG_LDO1, 0xC9);
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if (ret)
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log_debug("vcore_emmc set failed: %d\n", ret);
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}
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static void __maybe_unused max77663_voltage_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDRESS, 1, &dev);
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if (ret) {
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log_debug("cannot find PMIC I2C chip\n");
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return;
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}
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/* 0x60 for 1.8v, bit7:0 = voltage */
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ret = dm_i2c_reg_write(dev, MAX77663_REG_SD2, 0x60);
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if (ret)
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log_debug("vdd_1v8_vio set failed: %d\n", ret);
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/* 0xEC for 3.00v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
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ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO3, 0xEC);
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if (ret)
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log_debug("vcore_emmc set failed: %d\n", ret);
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}
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/*
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* Routine: pin_mux_mmc
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* Description: setup the MMC muxes, power rails, etc.
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*/
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void pin_mux_mmc(void)
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{
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#ifdef CONFIG_GROUPER_MAX77663
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/* Bring up eMMC power on MAX PMIC */
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max77663_voltage_init();
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#endif
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#ifdef CONFIG_GROUPER_TPS65911
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/* Bring up eMMC power on TI PMIC */
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tps65911_voltage_init();
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#endif
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}
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#endif /* MMC */
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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/* Remove TrustZone nodes */
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fdt_del_node_and_alias(blob, "/firmware");
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fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000");
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return 0;
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}
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#endif
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void nvidia_board_late_init(void)
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{
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char serialno_str[17];
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/* Set chip id as serialno */
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sprintf(serialno_str, "%016llx", tegra_chip_uid());
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env_set("serial#", serialno_str);
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env_set("platform", "Tegra 3 T30");
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}
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