mirror of
https://github.com/AsahiLinux/u-boot
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506df9dc58
1. Convert all linker symbols to char[] type so that we can get the
corresponding address by calling array name 'var' or its address
'&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
standard header file to declare them.
[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL
Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
140 lines
2.8 KiB
C
140 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 NXP
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*/
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#include <common.h>
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#include <command.h>
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#include <cpu_func.h>
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#include <hang.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/imx93_pins.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/arch-mx7ulp/gpio.h>
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#include <asm/mach-imx/syscounter.h>
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#include <asm/sections.h>
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#include <dm/uclass.h>
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#include <dm/device.h>
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#include <dm/uclass-internal.h>
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#include <dm/device-internal.h>
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#include <linux/delay.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ccm_regs.h>
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#include <asm/arch/ddr.h>
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#include <power/pmic.h>
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#include <power/pca9450.h>
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#include <asm/arch/trdc.h>
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DECLARE_GLOBAL_DATA_PTR;
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int spl_board_boot_device(enum boot_device boot_dev_spl)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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void spl_board_init(void)
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{
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puts("Normal Boot\n");
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}
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void spl_dram_init(void)
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{
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ddr_init(&dram_timing);
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}
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#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
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int power_init_board(void)
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{
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struct udevice *dev;
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int ret;
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ret = pmic_get("pmic@25", &dev);
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if (ret == -ENODEV) {
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puts("No pca9450@25\n");
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return 0;
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}
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if (ret != 0)
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return ret;
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/* BUCKxOUT_DVS0/1 control BUCK123 output */
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pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
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/* enable DVS control through PMIC_STBY_REQ */
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pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
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if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) {
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/* 0.75v for Low drive mode
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*/
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pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x0c);
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pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x0c);
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} else {
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/* 0.9v for Over drive mode
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*/
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pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
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pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
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}
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/* set standby voltage to 0.65v */
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pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4);
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/* I2C_LT_EN*/
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pmic_reg_write(dev, 0xa, 0x3);
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return 0;
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}
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#endif
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extern int imx9_probe_mu(void *ctx, struct event *event);
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void board_init_f(ulong dummy)
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{
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int ret;
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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timer_init();
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arch_cpu_init();
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board_early_init_f();
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spl_early_init();
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preloader_console_init();
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ret = imx9_probe_mu(NULL, NULL);
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if (ret) {
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printf("Fail to init Sentinel API\n");
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} else {
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printf("SOC: 0x%x\n", gd->arch.soc_rev);
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printf("LC: 0x%x\n", gd->arch.lifecycle);
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}
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power_init_board();
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if (!IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE))
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set_arm_clk(get_cpu_speed_grade_hz());
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/* Init power of mix */
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soc_power_init();
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/* Setup TRDC for DDR access */
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trdc_init();
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/* DDR initialization */
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spl_dram_init();
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/* Put M33 into CPUWAIT for following kick */
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ret = m33_prepare();
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if (!ret)
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printf("M33 prepare ok\n");
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board_init_r(NULL, 0);
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}
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