mirror of
https://github.com/AsahiLinux/u-boot
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e6294e0579
Generally the microcode is combined into a single block only (and removed from the device tree) when there are multiple blocks. But this is not a requirement. Adjust the ivybridge code to avoid assuming this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
183 lines
4.7 KiB
C
183 lines
4.7 KiB
C
/*
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* Copyright (c) 2014 Google, Inc
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* Copyright (C) 2000 Ronald G. Minnich
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*
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* Microcode update for Intel PIII and later CPUs
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <libfdt.h>
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#include <asm/cpu.h>
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#include <asm/microcode.h>
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#include <asm/msr.h>
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#include <asm/msr-index.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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/**
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* struct microcode_update - standard microcode header from Intel
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*
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* We read this information out of the device tree and use it to determine
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* whether the update is applicable or not. We also use the same structure
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* to read information from the CPU.
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*/
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struct microcode_update {
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uint header_version;
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uint update_revision;
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uint date_code;
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uint processor_signature;
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uint checksum;
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uint loader_revision;
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uint processor_flags;
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const void *data;
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int size;
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};
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static int microcode_decode_node(const void *blob, int node,
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struct microcode_update *update)
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{
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update->data = fdt_getprop(blob, node, "data", &update->size);
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if (!update->data)
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return -ENOENT;
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update->data += UCODE_HEADER_LEN;
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update->size -= UCODE_HEADER_LEN;
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update->header_version = fdtdec_get_int(blob, node,
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"intel,header-version", 0);
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update->update_revision = fdtdec_get_int(blob, node,
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"intel,update-revision", 0);
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update->date_code = fdtdec_get_int(blob, node,
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"intel,date-code", 0);
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update->processor_signature = fdtdec_get_int(blob, node,
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"intel,processor-signature", 0);
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update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
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update->loader_revision = fdtdec_get_int(blob, node,
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"intel,loader-revision", 0);
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update->processor_flags = fdtdec_get_int(blob, node,
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"intel,processor-flags", 0);
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return 0;
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}
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int microcode_read_rev(void)
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{
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/* Quark does not have microcode MSRs */
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#ifdef CONFIG_INTEL_QUARK
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return 0;
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#else
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/*
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* Some Intel CPUs can be very finicky about the CPUID sequence used.
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* So this is implemented in assembly so that it works reliably.
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*/
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uint32_t low, high;
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asm volatile (
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"xorl %%eax, %%eax\n"
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"xorl %%edx, %%edx\n"
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"movl %2, %%ecx\n"
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"wrmsr\n"
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"movl $0x01, %%eax\n"
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"cpuid\n"
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"movl %2, %%ecx\n"
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"rdmsr\n"
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: /* outputs */
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"=a" (low), "=d" (high)
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: /* inputs */
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"i" (MSR_IA32_UCODE_REV)
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: /* clobbers */
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"ebx", "ecx"
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);
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return high;
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#endif
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}
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static void microcode_read_cpu(struct microcode_update *cpu)
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{
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/* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
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unsigned int x86_model, x86_family;
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struct cpuid_result result;
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uint32_t low, high;
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wrmsr(MSR_IA32_UCODE_REV, 0, 0);
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result = cpuid(1);
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rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
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x86_model = (result.eax >> 4) & 0x0f;
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x86_family = (result.eax >> 8) & 0x0f;
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cpu->processor_signature = result.eax;
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cpu->processor_flags = 0;
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if ((x86_model >= 5) || (x86_family > 6)) {
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rdmsr(0x17, low, high);
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cpu->processor_flags = 1 << ((high >> 18) & 7);
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}
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debug("microcode: sig=%#x pf=%#x revision=%#x\n",
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cpu->processor_signature, cpu->processor_flags,
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cpu->update_revision);
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}
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/* Get a microcode update from the device tree and apply it */
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int microcode_update_intel(void)
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{
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struct microcode_update cpu, update;
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const void *blob = gd->fdt_blob;
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int skipped;
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int count;
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int node;
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int ret;
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int rev;
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microcode_read_cpu(&cpu);
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node = 0;
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count = 0;
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skipped = 0;
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do {
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node = fdtdec_next_compatible(blob, node,
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COMPAT_INTEL_MICROCODE);
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if (node < 0) {
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debug("%s: Found %d updates\n", __func__, count);
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return count ? 0 : skipped ? -EEXIST : -ENOENT;
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}
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ret = microcode_decode_node(blob, node, &update);
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if (ret == -ENOENT && ucode_base) {
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/*
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* The microcode has been removed from the device tree
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* in the build system. In that case it will have
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* already been updated in car_init().
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*/
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debug("%s: Microcode data not available\n", __func__);
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skipped++;
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continue;
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}
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if (ret) {
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debug("%s: Unable to decode update: %d\n", __func__,
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ret);
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return ret;
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}
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if (!(update.processor_signature == cpu.processor_signature &&
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(update.processor_flags & cpu.processor_flags))) {
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debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
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__func__, update.processor_signature,
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update.processor_flags);
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skipped++;
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continue;
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}
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wrmsr(MSR_IA32_UCODE_WRITE, (ulong)update.data, 0);
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rev = microcode_read_rev();
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debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
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rev, update.date_code & 0xffff,
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(update.date_code >> 24) & 0xff,
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(update.date_code >> 16) & 0xff);
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if (update.update_revision != rev) {
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printf("Microcode update failed\n");
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return -EFAULT;
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}
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count++;
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} while (1);
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}
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