mirror of
https://github.com/AsahiLinux/u-boot
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185f812c41
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
367 lines
8.5 KiB
C
367 lines
8.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2020 Marvell International Ltd.
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*/
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#include <env.h>
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#include <errno.h>
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#include <linux/compat.h>
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#include <linux/ctype.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-model.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-ciu-defs.h>
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struct cvmx_coremask *get_coremask_override(struct cvmx_coremask *pcm)
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{
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struct cvmx_coremask pcm_override = CVMX_COREMASK_MAX;
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char *cptr;
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/* The old code sets the number of cores to be to 16 in this case. */
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cvmx_coremask_set_cores(pcm, 0, 16);
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if (OCTEON_IS_OCTEON2() || OCTEON_IS_OCTEON3())
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cvmx_coremask_copy(pcm, &pcm_override);
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cptr = env_get("coremask_override");
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if (cptr) {
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if (cvmx_coremask_str2bmp(pcm, cptr) < 0)
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return NULL;
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}
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return pcm;
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}
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/* Validate the coremask that is passed to a boot* function. */
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int validate_coremask(struct cvmx_coremask *pcm)
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{
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struct cvmx_coremask coremask_override;
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struct cvmx_coremask fuse_coremask;
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if (!get_coremask_override(&coremask_override))
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return -1;
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octeon_get_available_coremask(&fuse_coremask);
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if (!cvmx_coremask_is_subset(&fuse_coremask, pcm)) {
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puts("ERROR: Can't boot cores that don't exist!\n");
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puts("Available coremask:\n");
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cvmx_coremask_print(&fuse_coremask);
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return -1;
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}
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if (!cvmx_coremask_is_subset(&coremask_override, pcm)) {
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struct cvmx_coremask print_cm;
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puts("Notice: coremask changed from:\n");
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cvmx_coremask_print(pcm);
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puts("based on coremask_override of:\n");
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cvmx_coremask_print(&coremask_override);
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cvmx_coremask_and(&print_cm, pcm, &coremask_override);
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puts("to:\n");
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cvmx_coremask_print(&print_cm);
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}
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return 0;
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}
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/**
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* In CIU_FUSE for the 78XX, odd and even cores are separated out.
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* For example, a CIU_FUSE value of 0xfffffefffffe indicates that bits 0 and 1
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* are set.
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* This function converts the bit number in the CIU_FUSE register to a
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* physical core number.
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*/
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static int convert_ciu_fuse_to_physical_core(int core, int max_cores)
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{
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if (!octeon_has_feature(OCTEON_FEATURE_CIU3))
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return core;
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else if (!OCTEON_IS_MODEL(OCTEON_CN78XX))
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return core;
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else if (core < (max_cores / 2))
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return core * 2;
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else
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return ((core - (max_cores / 2)) * 2) + 1;
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}
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/**
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* Get the total number of fuses blown as well as the number blown per tad.
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*
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* @param coremask fuse coremask
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* @param[out] tad_blown_count number of cores blown for each tad
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* @param num_tads number of tads
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* @param max_cores maximum number of cores
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*
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* Return: void
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*/
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void fill_tad_corecount(u64 coremask, int tad_blown_count[], int num_tads,
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int max_cores)
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{
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int core, physical_core;
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for (core = 0; core < max_cores; core++) {
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if (!(coremask & (1ULL << core))) {
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int tad;
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physical_core =
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convert_ciu_fuse_to_physical_core(core,
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max_cores);
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tad = physical_core % num_tads;
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tad_blown_count[tad]++;
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}
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}
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}
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u64 get_core_pattern(int num_tads, int max_cores)
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{
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u64 pattern = 1ULL;
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int cnt;
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for (cnt = 1; cnt < (max_cores / num_tads); cnt++)
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pattern |= pattern << num_tads;
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return pattern;
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}
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/**
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* For CN78XX and CN68XX this function returns the logical coremask from the
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* CIU_FUSE register value. For other models there is no difference.
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*
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* @param ciu_fuse_value fuse value from CIU_FUSE register
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* Return: logical coremask of CIU_FUSE value.
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*/
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u64 get_logical_coremask(u64 ciu_fuse_value)
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{
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int tad_blown_count[MAX_CORE_TADS] = {0};
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int tad;
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u64 logical_coremask = 0;
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u64 tad_mask, pattern;
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int num_tads, max_cores;
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if (OCTEON_IS_MODEL(OCTEON_CN78XX)) {
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num_tads = 8;
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max_cores = 48;
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} else if (OCTEON_IS_MODEL(OCTEON_CN73XX) ||
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OCTEON_IS_MODEL(OCTEON_CNF75XX)) {
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num_tads = 4;
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max_cores = 16;
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} else if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
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num_tads = 4;
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max_cores = 32;
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} else {
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/* Most Octeon devices don't need any mapping. */
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return ciu_fuse_value;
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}
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pattern = get_core_pattern(num_tads, max_cores);
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fill_tad_corecount(ciu_fuse_value, tad_blown_count,
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num_tads, max_cores);
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for (tad = 0; tad < num_tads; tad++) {
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tad_mask = pattern << tad;
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logical_coremask |= tad_mask >> (tad_blown_count[tad] * num_tads);
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}
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return logical_coremask;
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}
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/**
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* Returns the available coremask either from env or fuses.
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* If the fuses are blown and locked, they are the definitive coremask.
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*
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* @param pcm pointer to coremask to fill in
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* Return: pointer to coremask
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*/
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struct cvmx_coremask *octeon_get_available_coremask(struct cvmx_coremask *pcm)
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{
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u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */
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u64 ciu_fuse;
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u64 cores;
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cvmx_coremask_clear_all(pcm);
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if (octeon_has_feature(OCTEON_FEATURE_CIU3)) {
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int node;
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cvmx_coremask_for_each_node(node, node_mask) {
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ciu_fuse = (csr_rd(CVMX_CIU_FUSE) &
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0x0000FFFFFFFFFFFFULL);
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ciu_fuse = get_logical_coremask(ciu_fuse);
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cvmx_coremask_set64_node(pcm, node, ciu_fuse);
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}
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return pcm;
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}
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ciu_fuse = (csr_rd(CVMX_CIU_FUSE) & 0x0000FFFFFFFFFFFFULL);
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ciu_fuse = get_logical_coremask(ciu_fuse);
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if (OCTEON_IS_MODEL(OCTEON_CN68XX))
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cvmx_coremask_set64(pcm, ciu_fuse);
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/* Get number of cores from fuse register, convert to coremask */
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cores = __builtin_popcountll(ciu_fuse);
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cvmx_coremask_set_cores(pcm, 0, cores);
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return pcm;
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}
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int cvmx_coremask_str2bmp(struct cvmx_coremask *pcm, char *hexstr)
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{
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int i, j;
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int l; /* length of the hexstr in characters */
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int lb; /* number of bits taken by hexstr */
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int hldr_offset;/* holder's offset within the coremask */
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int hldr_xsz; /* holder's size in the number of hex digits */
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u64 h;
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char c;
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#define MINUS_ONE (hexstr[0] == '-' && hexstr[1] == '1' && hexstr[2] == 0)
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if (MINUS_ONE) {
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cvmx_coremask_set_all(pcm);
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return 0;
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}
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/* Skip '0x' from hexstr */
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if (hexstr[0] == '0' && (hexstr[1] == 'x' || hexstr[1] == 'X'))
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hexstr += 2;
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if (!strlen(hexstr)) {
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printf("%s: Error: hex string is empty\n", __func__);
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return -2;
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}
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/* Trim leading zeros */
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while (*hexstr == '0')
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hexstr++;
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cvmx_coremask_clear_all(pcm);
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l = strlen(hexstr);
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/* If length is 0 then the hex string must be all zeros */
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if (l == 0)
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return 0;
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for (i = 0; i < l; i++) {
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if (isxdigit((int)hexstr[i]) == 0) {
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printf("%s: Non-hex digit within hexstr\n", __func__);
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return -2;
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}
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}
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lb = (l - 1) * 4;
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if (hexstr[0] > '7')
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lb += 4;
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else if (hexstr[0] > '3')
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lb += 3;
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else if (hexstr[0] > '1')
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lb += 2;
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else
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lb += 1;
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if (lb > CVMX_MIPS_MAX_CORES) {
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printf("%s: hexstr (%s) is too long\n", __func__, hexstr);
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return -1;
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}
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hldr_offset = 0;
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hldr_xsz = 2 * sizeof(u64);
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for (i = l; i > 0; i -= hldr_xsz) {
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c = hexstr[i];
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hexstr[i] = 0;
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j = i - hldr_xsz;
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if (j < 0)
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j = 0;
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h = simple_strtoull(&hexstr[j], NULL, 16);
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if (errno == EINVAL) {
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printf("%s: strtou returns w/ EINVAL\n", __func__);
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return -2;
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}
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pcm->coremask_bitmap[hldr_offset] = h;
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hexstr[i] = c;
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hldr_offset++;
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}
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return 0;
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}
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void cvmx_coremask_print(const struct cvmx_coremask *pcm)
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{
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int i, j;
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int start;
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int found = 0;
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/*
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* Print one node per line. Since the bitmap is stored LSB to MSB
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* we reverse the order when printing.
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*/
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if (!octeon_has_feature(OCTEON_FEATURE_MULTINODE)) {
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start = 0;
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for (j = CVMX_COREMASK_MAX_CORES_PER_NODE -
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CVMX_COREMASK_HLDRSZ;
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j >= 0; j -= CVMX_COREMASK_HLDRSZ) {
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if (pcm->coremask_bitmap[j / CVMX_COREMASK_HLDRSZ] != 0)
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start = 1;
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if (start) {
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printf(" 0x%llx",
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(u64)pcm->coremask_bitmap[j /
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CVMX_COREMASK_HLDRSZ]);
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}
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}
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if (start)
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found = 1;
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/*
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* If the coremask is empty print <EMPTY> so it is not
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* confusing
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*/
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if (!found)
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printf("<EMPTY>");
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printf("\n");
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return;
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}
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for (i = 0; i < CVMX_MAX_USED_CORES_BMP;
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i += CVMX_COREMASK_MAX_CORES_PER_NODE) {
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printf("%s node %d:", i > 0 ? "\n" : "",
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cvmx_coremask_core_to_node(i));
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start = 0;
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for (j = i + CVMX_COREMASK_MAX_CORES_PER_NODE -
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CVMX_COREMASK_HLDRSZ;
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j >= i;
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j -= CVMX_COREMASK_HLDRSZ) {
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/* Don't start printing until we get a non-zero word. */
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if (pcm->coremask_bitmap[j / CVMX_COREMASK_HLDRSZ] != 0)
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start = 1;
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if (start) {
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printf(" 0x%llx", (u64)pcm->coremask_bitmap[j /
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CVMX_COREMASK_HLDRSZ]);
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}
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}
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if (start)
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found = 1;
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}
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i /= CVMX_COREMASK_HLDRSZ;
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for (; i < CVMX_COREMASK_BMPSZ; i++) {
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if (pcm->coremask_bitmap[i]) {
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printf(" EXTRA GARBAGE[%i]: %016llx\n", i,
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(u64)pcm->coremask_bitmap[i]);
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}
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}
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/* If the coremask is empty print <EMPTY> so it is not confusing */
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if (!found)
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printf("<EMPTY>");
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printf("\n");
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}
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