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16c50d61ee
Import cvmx-cmd-queue.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
355 lines
10 KiB
C
355 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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* Support functions for managing command queues used for
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* various hardware blocks.
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*/
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#include <errno.h>
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#include <log.h>
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#include <time.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/cvmx-pcie.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-fpa.h>
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#include <mach/cvmx-cmd-queue.h>
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#include <mach/cvmx-agl-defs.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include <mach/cvmx-ciu-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-gserx-defs.h>
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#include <mach/cvmx-ilk-defs.h>
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#include <mach/cvmx-ipd-defs.h>
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#include <mach/cvmx-pcsx-defs.h>
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#include <mach/cvmx-pcsxx-defs.h>
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#include <mach/cvmx-pki-defs.h>
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#include <mach/cvmx-pko-defs.h>
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#include <mach/cvmx-xcv-defs.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-ilk.h>
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#include <mach/cvmx-pki.h>
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#include <mach/cvmx-pko3.h>
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#include <mach/cvmx-pko3-queue.h>
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#include <mach/cvmx-pko3-resources.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-bgx.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-util.h>
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#include <mach/cvmx-helper-pki.h>
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#include <mach/cvmx-helper-util.h>
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#include <mach/cvmx-dpi-defs.h>
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#include <mach/cvmx-npei-defs.h>
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#include <mach/cvmx-pexp-defs.h>
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/**
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* This application uses this pointer to access the global queue
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* state. It points to a bootmem named block.
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*/
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__cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptrs[CVMX_MAX_NODES];
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/**
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* @INTERNAL
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* Initialize the Global queue state pointer.
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*
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* @return CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(unsigned int node)
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{
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const char *alloc_name = "cvmx_cmd_queues\0\0";
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char s[4] = "_0";
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const struct cvmx_bootmem_named_block_desc *block_desc = NULL;
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unsigned int size;
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u64 paddr_min = 0, paddr_max = 0;
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void *ptr;
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if (cvmx_likely(__cvmx_cmd_queue_state_ptrs[node]))
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return CVMX_CMD_QUEUE_SUCCESS;
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/* Add node# to block name */
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if (node > 0) {
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s[1] += node;
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strcat((char *)alloc_name, s);
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}
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/* Find the named block in case it has been created already */
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block_desc = cvmx_bootmem_find_named_block(alloc_name);
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if (block_desc) {
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__cvmx_cmd_queue_state_ptrs[node] =
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(__cvmx_cmd_queue_all_state_t *)cvmx_phys_to_ptr(
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block_desc->base_addr);
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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size = sizeof(*__cvmx_cmd_queue_state_ptrs[node]);
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/* Rest f the code is to allocate a new named block */
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/* Atomically allocate named block once, and zero it by default */
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ptr = cvmx_bootmem_alloc_named_range_once(size, paddr_min, paddr_max,
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128, alloc_name, NULL);
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if (ptr) {
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__cvmx_cmd_queue_state_ptrs[node] =
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(__cvmx_cmd_queue_all_state_t *)ptr;
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} else {
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debug("ERROR: %s: Unable to get named block %s.\n", __func__,
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alloc_name);
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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/**
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* Initialize a command queue for use. The initial FPA buffer is
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* allocated and the hardware unit is configured to point to the
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* new command queue.
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*
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* @param queue_id Hardware command queue to initialize.
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* @param max_depth Maximum outstanding commands that can be queued.
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* @param fpa_pool FPA pool the command queues should come from.
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* @param pool_size Size of each buffer in the FPA pool (bytes)
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*
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* @return CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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cvmx_cmd_queue_result_t cvmx_cmd_queue_initialize(cvmx_cmd_queue_id_t queue_id,
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int max_depth, int fpa_pool,
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int pool_size)
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{
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__cvmx_cmd_queue_state_t *qstate;
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cvmx_cmd_queue_result_t result;
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unsigned int node;
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unsigned int index;
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int fpa_pool_min, fpa_pool_max;
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union cvmx_fpa_ctl_status status;
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void *buffer;
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node = __cvmx_cmd_queue_get_node(queue_id);
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index = __cvmx_cmd_queue_get_index(queue_id);
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if (index >= NUM_ELEMENTS(__cvmx_cmd_queue_state_ptrs[node]->state)) {
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printf("ERROR: %s: queue %#x out of range\n", __func__,
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queue_id);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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result = __cvmx_cmd_queue_init_state_ptr(node);
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if (result != CVMX_CMD_QUEUE_SUCCESS)
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return result;
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qstate = __cvmx_cmd_queue_get_state(queue_id);
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if (!qstate)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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/*
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* We artificially limit max_depth to 1<<20 words. It is an
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* arbitrary limit.
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*/
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if (CVMX_CMD_QUEUE_ENABLE_MAX_DEPTH) {
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if (max_depth < 0 || max_depth > 1 << 20)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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} else if (max_depth != 0) {
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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/* CVMX_FPA_NUM_POOLS maps to cvmx_fpa3_num_auras for FPA3 */
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fpa_pool_min = node << 10;
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fpa_pool_max = fpa_pool_min + CVMX_FPA_NUM_POOLS;
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if (fpa_pool < fpa_pool_min || fpa_pool >= fpa_pool_max)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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if (pool_size < 128 || pool_size > (1 << 17))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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if (pool_size & 3)
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debug("WARNING: %s: pool_size %d not multiple of 8\n", __func__,
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pool_size);
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/* See if someone else has already initialized the queue */
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if (qstate->base_paddr) {
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int depth;
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static const char emsg[] = /* Common error message part */
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"Queue already initialized with different ";
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depth = (max_depth + qstate->pool_size_m1 - 1) /
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qstate->pool_size_m1;
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if (depth != qstate->max_depth) {
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depth = qstate->max_depth * qstate->pool_size_m1;
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debug("ERROR: %s: %s max_depth (%d).\n", __func__, emsg,
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depth);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if (fpa_pool != qstate->fpa_pool) {
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debug("ERROR: %s: %s FPA pool (%d).\n", __func__, emsg,
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(int)qstate->fpa_pool);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if ((pool_size >> 3) - 1 != qstate->pool_size_m1) {
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debug("ERROR: %s: %s FPA pool size (%u).\n", __func__,
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emsg, (qstate->pool_size_m1 + 1) << 3);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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return CVMX_CMD_QUEUE_ALREADY_SETUP;
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}
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if (!(octeon_has_feature(OCTEON_FEATURE_FPA3))) {
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status.u64 = csr_rd(CVMX_FPA_CTL_STATUS);
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if (!status.s.enb) {
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debug("ERROR: %s: FPA is not enabled.\n",
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__func__);
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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}
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buffer = cvmx_fpa_alloc(fpa_pool);
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if (!buffer) {
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debug("ERROR: %s: allocating first buffer.\n", __func__);
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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index = (pool_size >> 3) - 1;
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qstate->pool_size_m1 = index;
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qstate->max_depth = (max_depth + index - 1) / index;
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qstate->index = 0;
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qstate->fpa_pool = fpa_pool;
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qstate->base_paddr = cvmx_ptr_to_phys(buffer);
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/* Initialize lock */
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__cvmx_cmd_queue_lock_init(queue_id);
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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/**
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* Return the command buffer to be written to. The purpose of this
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* function is to allow CVMX routine access to the low level buffer
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* for initial hardware setup. User applications should not call this
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* function directly.
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*
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* @param queue_id Command queue to query
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*
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* @return Command buffer or NULL on failure
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*/
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void *cvmx_cmd_queue_buffer(cvmx_cmd_queue_id_t queue_id)
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{
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__cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
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if (qptr && qptr->base_paddr)
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return cvmx_phys_to_ptr((u64)qptr->base_paddr);
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else
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return NULL;
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}
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static u64 *__cvmx_cmd_queue_add_blk(__cvmx_cmd_queue_state_t *qptr)
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{
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u64 *cmd_ptr;
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u64 *new_buffer;
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u64 new_paddr;
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/* Get base vaddr of current (full) block */
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cmd_ptr = (u64 *)cvmx_phys_to_ptr((u64)qptr->base_paddr);
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/* Allocate a new block from the per-queue pool */
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new_buffer = (u64 *)cvmx_fpa_alloc(qptr->fpa_pool);
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/* Check for allocation failure */
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if (cvmx_unlikely(!new_buffer))
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return NULL;
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/* Zero out the new block link pointer,
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* in case this block will be filled to the rim
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*/
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new_buffer[qptr->pool_size_m1] = ~0ull;
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/* Get physical address of the new buffer */
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new_paddr = cvmx_ptr_to_phys(new_buffer);
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/* Store the physical link address at the end of current full block */
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cmd_ptr[qptr->pool_size_m1] = new_paddr;
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/* Store the physical address in the queue state structure */
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qptr->base_paddr = new_paddr;
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qptr->index = 0;
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/* Return the virtual base of the new block */
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return new_buffer;
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}
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/**
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* @INTERNAL
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* Add command words into a queue, handles all the corener cases
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* where only some of the words might fit into the current block,
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* and a new block may need to be allocated.
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* Locking and argument checks are done in the front-end in-line
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* functions that call this one for the rare corner cases.
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*/
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cvmx_cmd_queue_result_t
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__cvmx_cmd_queue_write_raw(cvmx_cmd_queue_id_t queue_id,
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__cvmx_cmd_queue_state_t *qptr, int cmd_count,
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const u64 *cmds)
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{
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u64 *cmd_ptr;
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unsigned int index;
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cmd_ptr = (u64 *)cvmx_phys_to_ptr((u64)qptr->base_paddr);
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index = qptr->index;
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/* Enforce queue depth limit, if enabled, once per block */
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if (CVMX_CMD_QUEUE_ENABLE_MAX_DEPTH && cvmx_unlikely(qptr->max_depth)) {
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unsigned int depth = cvmx_cmd_queue_length(queue_id);
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depth /= qptr->pool_size_m1;
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if (cvmx_unlikely(depth > qptr->max_depth))
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return CVMX_CMD_QUEUE_FULL;
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}
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/*
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* If the block allocation fails, even the words that we wrote
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* to the current block will not count because the 'index' will
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* not be comitted.
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* The loop is run 'count + 1' times to take care of the tail
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* case, where the buffer is full to the rim, so the link
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* pointer must be filled with a valid address.
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*/
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while (cmd_count >= 0) {
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if (index >= qptr->pool_size_m1) {
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/* Block is full, get another one and proceed */
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cmd_ptr = __cvmx_cmd_queue_add_blk(qptr);
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/* Baul on allocation error w/o comitting anything */
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if (cvmx_unlikely(!cmd_ptr))
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return CVMX_CMD_QUEUE_NO_MEMORY;
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/* Reset index for start of new block */
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index = 0;
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}
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/* Exit Loop on 'count + 1' iterations */
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if (cmd_count <= 0)
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break;
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/* Store commands into queue block while there is space */
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cmd_ptr[index++] = *cmds++;
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cmd_count--;
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} /* while cmd_count */
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/* Commit added words if all is well */
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qptr->index = index;
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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