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https://github.com/AsahiLinux/u-boot
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08cbba2abf
This patch adds support for the Beagle xM. It uses the board ID GPIO bits to recognize this revision and perform appropriate setup. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
171 lines
4.6 KiB
C
171 lines
4.6 KiB
C
/*
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Sunil Kumar <sunilsaini05@gmail.com>
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* Shashi Ranjan <shashiranjanmca05@gmail.com>
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*
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* Derived from Beagle Board and 3430 SDP code by
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <twl4030.h>
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#include <asm/io.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/gpio.h>
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#include <asm/mach-types.h>
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#include "beagle.h"
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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return 0;
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}
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/*
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* Routine: get_board_revision
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* Description: Detect if we are running on a Beagle revision Ax/Bx,
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* C1/2/3, C4 or xM. This can be done by reading
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* the level of GPIO173, GPIO172 and GPIO171. This should
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* result in
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* GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
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* GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
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* GPIO173, GPIO172, GPIO171: 1 0 1 => C4
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* GPIO173, GPIO172, GPIO171: 0 0 0 => xM
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*/
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int get_board_revision(void)
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{
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int revision;
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if (!omap_request_gpio(171) &&
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!omap_request_gpio(172) &&
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!omap_request_gpio(173)) {
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omap_set_gpio_direction(171, 1);
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omap_set_gpio_direction(172, 1);
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omap_set_gpio_direction(173, 1);
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revision = omap_get_gpio_datain(173) << 2 |
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omap_get_gpio_datain(172) << 1 |
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omap_get_gpio_datain(171);
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omap_free_gpio(171);
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omap_free_gpio(172);
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omap_free_gpio(173);
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} else {
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printf("Error: unable to acquire board revision GPIOs\n");
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revision = -1;
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}
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return revision;
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}
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/*
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* Routine: misc_init_r
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* Description: Configure board specific parts
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*/
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int misc_init_r(void)
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{
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struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
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struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
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switch (get_board_revision()) {
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case REVISION_AXBX:
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printf("Beagle Rev Ax/Bx\n");
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setenv("beaglerev", "AxBx");
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setenv("mpurate", "600");
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break;
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case REVISION_CX:
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printf("Beagle Rev C1/C2/C3\n");
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setenv("beaglerev", "Cx");
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setenv("mpurate", "600");
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MUX_BEAGLE_C();
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break;
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case REVISION_C4:
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printf("Beagle Rev C4\n");
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setenv("beaglerev", "C4");
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setenv("mpurate", "720");
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MUX_BEAGLE_C();
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/* Set VAUX2 to 1.8V for EHCI PHY */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
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TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
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TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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break;
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case REVISION_XM:
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printf("Beagle xM Rev A\n");
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setenv("beaglerev", "xMA");
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setenv("mpurate", "1000");
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MUX_BEAGLE_XM();
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/* Set VAUX2 to 1.8V for EHCI PHY */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
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TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
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TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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break;
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default:
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printf("Beagle unknown 0x%02x\n", get_board_revision());
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}
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twl4030_power_init();
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twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
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/* Configure GPIOs to output */
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writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
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writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
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GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
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/* Set GPIOs */
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writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
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&gpio6_base->setdataout);
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writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
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GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
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dieid_num_r();
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_BEAGLE();
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}
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