mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
142 lines
3.8 KiB
C
142 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Broadcom Corporation.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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#include <asm/arch/sysmap.h>
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#include <asm/kona-common/clk.h>
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#include "clk-core.h"
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#define WR_ACCESS_ADDR ESUB_CLK_BASE_ADDR
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#define WR_ACCESS_PASSWORD 0xA5A500
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#define PLLE_POST_RESETB_ADDR (ESUB_CLK_BASE_ADDR + 0x00000C00)
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#define PLLE_RESETB_ADDR (ESUB_CLK_BASE_ADDR + 0x00000C58)
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#define PLLE_RESETB_I_PLL_RESETB_PLLE_MASK 0x00010000
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#define PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK 0x00000001
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#define PLL_LOCK_ADDR (ESUB_CLK_BASE_ADDR + 0x00000C38)
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#define PLL_LOCK_PLL_LOCK_PLLE_MASK 0x00000001
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#define ESW_SYS_DIV_ADDR (ESUB_CLK_BASE_ADDR + 0x00000A04)
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#define ESW_SYS_DIV_PLL_SELECT_MASK 0x00000300
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#define ESW_SYS_DIV_DIV_MASK 0x0000001C
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#define ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT 0x00000100
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#define ESW_SYS_DIV_DIV_SELECT 0x4
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#define ESW_SYS_DIV_TRIGGER_MASK 0x00000001
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#define ESUB_AXI_DIV_DEBUG_ADDR (ESUB_CLK_BASE_ADDR + 0x00000E04)
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#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK 0x0000001C
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#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK 0x00000040
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#define ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT 0x0
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#define ESUB_AXI_DIV_DEBUG_TRIGGER_MASK 0x00000001
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#define PLL_MAX_RETRY 100
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/* Enable appropriate clocks for Ethernet */
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int clk_eth_enable(void)
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{
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int rc = -1;
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int retry_count = 0;
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rc = clk_get_and_enable("esub_ccu_clk");
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/* Enable Access to CCU registers */
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writel((1 | WR_ACCESS_PASSWORD), WR_ACCESS_ADDR);
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writel(readl(PLLE_POST_RESETB_ADDR) &
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~PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK,
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PLLE_POST_RESETB_ADDR);
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/* Take PLL out of reset and put into normal mode */
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writel(readl(PLLE_RESETB_ADDR) | PLLE_RESETB_I_PLL_RESETB_PLLE_MASK,
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PLLE_RESETB_ADDR);
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/* Wait for PLL lock */
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rc = -1;
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while (retry_count < PLL_MAX_RETRY) {
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udelay(100);
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if (readl(PLL_LOCK_ADDR) & PLL_LOCK_PLL_LOCK_PLLE_MASK) {
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rc = 0;
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break;
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}
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retry_count++;
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}
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if (rc == -1) {
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printf("%s: ETH-PLL lock timeout, Ethernet is not enabled!\n",
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__func__);
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return -1;
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}
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writel(readl(PLLE_POST_RESETB_ADDR) |
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PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK,
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PLLE_POST_RESETB_ADDR);
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/* Switch esw_sys_clk to use 104MHz(208MHz/2) clock */
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writel((readl(ESW_SYS_DIV_ADDR) &
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~(ESW_SYS_DIV_PLL_SELECT_MASK | ESW_SYS_DIV_DIV_MASK)) |
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ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT | ESW_SYS_DIV_DIV_SELECT,
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ESW_SYS_DIV_ADDR);
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writel(readl(ESW_SYS_DIV_ADDR) | ESW_SYS_DIV_TRIGGER_MASK,
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ESW_SYS_DIV_ADDR);
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/* Wait for trigger complete */
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rc = -1;
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retry_count = 0;
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while (retry_count < PLL_MAX_RETRY) {
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udelay(100);
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if (!(readl(ESW_SYS_DIV_ADDR) & ESW_SYS_DIV_TRIGGER_MASK)) {
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rc = 0;
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break;
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}
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retry_count++;
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}
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if (rc == -1) {
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printf("%s: SYS CLK Trigger timeout, Ethernet is not enabled!\n",
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__func__);
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return -1;
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}
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/* switch Esub AXI clock to 208MHz */
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writel((readl(ESUB_AXI_DIV_DEBUG_ADDR) &
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~(ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK |
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ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK |
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ESUB_AXI_DIV_DEBUG_TRIGGER_MASK)) |
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ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT |
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ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK,
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ESUB_AXI_DIV_DEBUG_ADDR);
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writel(readl(ESUB_AXI_DIV_DEBUG_ADDR) |
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ESUB_AXI_DIV_DEBUG_TRIGGER_MASK,
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ESUB_AXI_DIV_DEBUG_ADDR);
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/* Wait for trigger complete */
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rc = -1;
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retry_count = 0;
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while (retry_count < PLL_MAX_RETRY) {
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udelay(100);
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if (!(readl(ESUB_AXI_DIV_DEBUG_ADDR) &
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ESUB_AXI_DIV_DEBUG_TRIGGER_MASK)) {
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rc = 0;
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break;
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}
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retry_count++;
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}
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if (rc == -1) {
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printf("%s: AXI CLK Trigger timeout, Ethernet is not enabled!\n",
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__func__);
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return -1;
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}
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/* Disable Access to CCU registers */
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writel(WR_ACCESS_PASSWORD, WR_ACCESS_ADDR);
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return rc;
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}
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