mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 14:40:41 +00:00
7428f55c94
This patch is to implement pmic_mode_init function, and add prototype
in header file.
This function is to set switching mode for pmic buck regulators to
improve system efficiency.
Mode:
OFF: The regulator is switched off and the output voltage is discharged.
PFM: In this mode, the regulator is always in PFM mode, which
is useful at light loads for optimized efficiency.
PWM: In this mode, the regulator is always in PWM mode operation
regardless of load conditions.
APS: In this mode, the regulator moves automatically between
pulse skipping mode and PWM mode depending on load conditions.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
92 lines
2 KiB
C
92 lines
2 KiB
C
/*
|
|
* Copyright 2014 Freescale Semiconductor, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <errno.h>
|
|
#include <power/pmic.h>
|
|
#include <power/pfuze100_pmic.h>
|
|
|
|
int pfuze_mode_init(struct pmic *p, u32 mode)
|
|
{
|
|
unsigned char offset, i, switch_num;
|
|
u32 id, ret;
|
|
|
|
pmic_reg_read(p, PFUZE100_DEVICEID, &id);
|
|
id = id & 0xf;
|
|
|
|
if (id == 0) {
|
|
switch_num = 6;
|
|
offset = PFUZE100_SW1CMODE;
|
|
} else if (id == 1) {
|
|
switch_num = 4;
|
|
offset = PFUZE100_SW2MODE;
|
|
} else {
|
|
printf("Not supported, id=%d\n", id);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
|
|
if (ret < 0) {
|
|
printf("Set SW1AB mode error!\n");
|
|
return ret;
|
|
}
|
|
|
|
for (i = 0; i < switch_num - 1; i++) {
|
|
ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
|
|
if (ret < 0) {
|
|
printf("Set switch 0x%x mode error!\n",
|
|
offset + i * SWITCH_SIZE);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
struct pmic *pfuze_common_init(unsigned char i2cbus)
|
|
{
|
|
struct pmic *p;
|
|
int ret;
|
|
unsigned int reg;
|
|
|
|
ret = power_pfuze100_init(i2cbus);
|
|
if (ret)
|
|
return NULL;
|
|
|
|
p = pmic_get("PFUZE100");
|
|
ret = pmic_probe(p);
|
|
if (ret)
|
|
return NULL;
|
|
|
|
pmic_reg_read(p, PFUZE100_DEVICEID, ®);
|
|
printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
|
|
|
|
/* Set SW1AB stanby volage to 0.975V */
|
|
pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
|
|
reg &= ~SW1x_STBY_MASK;
|
|
reg |= SW1x_0_975V;
|
|
pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
|
|
|
|
/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
|
|
pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
|
|
reg &= ~SW1xCONF_DVSSPEED_MASK;
|
|
reg |= SW1xCONF_DVSSPEED_4US;
|
|
pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
|
|
|
|
/* Set SW1C standby voltage to 0.975V */
|
|
pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
|
|
reg &= ~SW1x_STBY_MASK;
|
|
reg |= SW1x_0_975V;
|
|
pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
|
|
|
|
/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
|
|
pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
|
|
reg &= ~SW1xCONF_DVSSPEED_MASK;
|
|
reg |= SW1xCONF_DVSSPEED_4US;
|
|
pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
|
|
|
|
return p;
|
|
}
|