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https://github.com/AsahiLinux/u-boot
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09f3ca3dd5
We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
111 lines
3.9 KiB
C
111 lines
3.9 KiB
C
/*
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* (C) Copyright 2012
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* Linaro
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* Linus Walleij <linus.walleij@linaro.org>
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* Common ARM Integrator configuration settings
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#define CONFIG_SYS_TEXT_BASE 0x01000000
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#define CONFIG_SYS_MEMTEST_START 0x100000
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#define CONFIG_SYS_MEMTEST_END 0x10000000
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#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
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#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
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/* Serial port PL010/PL011 through the device model */
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#define CONFIG_PL01X_SERIAL
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
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#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
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/*
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* There are various dependencies on the core module (CM) fitted
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* Users should refer to their CM user guide
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*/
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#include "armcoremodule.h"
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/*
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* Initialize and remap the core module, use SPD to detect memory size
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* If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
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* the core module has a CM_INIT register
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* then the U-Boot initialisation code will
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* e.g. ARM Boot Monitor or pre-loader is repeated once
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* (to re-initialise any existing CM_INIT settings to safe values).
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*
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* This is usually not the desired behaviour since the platform
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* will either reboot into the ARM monitor (or pre-loader)
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* or continuously cycle thru it without U-Boot running,
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* depending upon the setting of Integrator/CP switch S2-4.
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*
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* However it may be needed if Integrator/CP switch S2-1
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* is set OFF to boot direct into U-Boot.
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* In that case comment out the line below.
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*/
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#define CONFIG_CM_INIT
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#define CONFIG_CM_REMAP
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#define CONFIG_CM_SPD_DETECT
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/*
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* The ARM boot monitor initializes the board.
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* However, the default U-Boot code also performs the initialization.
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* If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
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* - see documentation supplied with board for details of how to choose the
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* image to run at reset/power up
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* e.g. whether the ARM Boot Monitor runs before U-Boot
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*/
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/* #define CONFIG_SKIP_LOWLEVEL_INIT */
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/*
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* The ARM boot monitor does not relocate U-Boot.
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* However, the default U-Boot code performs the relocation check,
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* and may relocate the code if the memory map is changed.
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* If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
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*/
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/* #define SKIP_CONFIG_RELOCATE_UBOOT */
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
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/*
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* FLASH and environment organization
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* Top varies according to amount fitted
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* Reserve top 4 blocks of flash
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* - ARM Boot Monitor
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* - Unused
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* - SIB block
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* - U-Boot environment
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*/
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#define CONFIG_CMD_ARMFLASH
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#define CONFIG_SYS_FLASH_CFI 1
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_FLASH_BASE 0x24000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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/* Timeout values in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
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#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
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