mirror of
https://github.com/AsahiLinux/u-boot
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b60b857387
board/ads5121/iopin.c
Replace bit fields in struct iopin_t with a single
field and intialize it via plain old macros.
This fixes the type pun warnings and makes the code
more readable.
board/ads5121/ads5121.c
Add include iopin.h to ads5121.c for the iopin_initialize
prototype.
Add an extern void ads5121_diu_init(void)
Signed-off-by: John Rigby <jrigby@freescale.com>
115 lines
3.4 KiB
C
115 lines
3.4 KiB
C
/*
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* (C) Copyright 2008
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* Martha J Marx, Silicon Turnkey Express, mmarx@silicontkx.com
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* mpc512x I/O pin/pad initialization for the ADS5121 board
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <linux/types.h>
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#include "iopin.h"
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/* IO pin fields */
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#define IO_PIN_FMUX(v) ((v) << 7) /* pin function */
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#define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */
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#define IO_PIN_PUD(v) ((v) << 4) /* if PUE, 0=pull-down, 1=pull-up */
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#define IO_PIN_PUE(v) ((v) << 3) /* pull up/down enable */
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#define IO_PIN_ST(v) ((v) << 2) /* schmitt trigger */
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#define IO_PIN_DS(v) ((v)) /* slew rate */
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static struct iopin_t {
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int p_offset; /* offset from IOCTL_MEM_OFFSET */
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int nr_pins; /* number of pins to set this way */
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int bit_or; /* or in the value instead of overwrite */
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u_long val; /* value to write or or */
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} ioregs_init[] = {
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/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
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{
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IOCTL_SPDIF_TXCLK, 3, 0,
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IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
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},
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/* Set highest Slew on 9 PATA pins */
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{
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IOCTL_PATA_CE1, 9, 1,
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IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
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},
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/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
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{
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IOCTL_PSC0_0, 15, 0,
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IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
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},
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/* FUNC1=SPDIF_TXCLK */
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{
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IOCTL_LPC_CS1, 1, 0,
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IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
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},
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/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
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{
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IOCTL_I2C1_SCL, 2, 0,
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IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
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},
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/* FUNC2=DIU CLK */
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{
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IOCTL_PSC6_0, 1, 0,
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IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
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},
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/* FUNC2=DIU_HSYNC */
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{
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IOCTL_PSC6_1, 1, 0,
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IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
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},
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/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
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{
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IOCTL_PSC6_4, 26, 0,
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IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
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IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
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}
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};
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void iopin_initialize(void)
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{
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short i, j, n, p;
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u_long *reg;
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immap_t *im = (immap_t *)CFG_IMMR;
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reg = (u_long *)&(im->io_ctrl.regs[0]);
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if (sizeof(ioregs_init) == 0)
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return;
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n = sizeof(ioregs_init) / sizeof(ioregs_init[0]);
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for (i = 0; i < n; i++) {
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for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long);
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p < ioregs_init[i].nr_pins; p++, j++) {
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if (ioregs_init[i].bit_or)
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reg[j] |= ioregs_init[i].val;
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else
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reg[j] = ioregs_init[i].val;
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}
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}
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return;
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}
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