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a744a284e3
Ethernet phy like dp83867 is using strapping resistors to setup PHY address. On Xilinx boards strapping is setup on wires which are connected to SOC where internal pull ups/downs influnce phy address. That's why there is a need to setup pins properly (via pinctrl driver for example) and then perform phy reset. I can be workarounded by reset gpio done for mdio bus but this is not working properly when multiply phys sitting on the same bus. That's why it needs to be done via ethernet-phy-id driver where dt binding has gpio reset per phy. DT binding is available here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml The driver is are reading the vendor and device id from valid phy node using ofnode_read_eth_phy_id() and creating a phy device. Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio support. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
609 lines
17 KiB
C
609 lines
17 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Andy Fleming <afleming@gmail.com>
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*
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* This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
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*/
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#ifndef _PHY_H
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#define _PHY_H
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#include <log.h>
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#include <phy_interface.h>
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#include <dm/ofnode.h>
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#include <dm/read.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/mdio.h>
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struct udevice;
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#define PHY_FIXED_ID 0xa5a55a5a
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#define PHY_NCSI_ID 0xbeefcafe
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/*
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* There is no actual id for this.
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* This is just a dummy id for gmii2rgmmi converter.
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*/
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#define PHY_GMII2RGMII_ID 0x5a5a5a5a
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#define PHY_MAX_ADDR 32
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#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
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#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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SUPPORTED_TP | \
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SUPPORTED_MII)
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#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
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SUPPORTED_10baseT_Full)
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#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
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SUPPORTED_100baseT_Full)
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#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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SUPPORTED_1000baseT_Full)
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#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
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PHY_100BT_FEATURES | \
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PHY_DEFAULT_FEATURES)
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#define PHY_100BT1_FEATURES (SUPPORTED_TP | \
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SUPPORTED_MII | \
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SUPPORTED_100baseT_Full)
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#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
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PHY_1000BT_FEATURES)
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#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
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SUPPORTED_10000baseT_Full)
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#ifndef PHY_ANEG_TIMEOUT
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#define PHY_ANEG_TIMEOUT 4000
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#endif
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struct phy_device;
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#define MDIO_NAME_LEN 32
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struct mii_dev {
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struct list_head link;
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char name[MDIO_NAME_LEN];
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void *priv;
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int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
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int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
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u16 val);
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int (*reset)(struct mii_dev *bus);
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struct phy_device *phymap[PHY_MAX_ADDR];
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u32 phy_mask;
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};
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/* struct phy_driver: a structure which defines PHY behavior
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*
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* uid will contain a number which represents the PHY. During
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* startup, the driver will poll the PHY to find out what its
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* UID--as defined by registers 2 and 3--is. The 32-bit result
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* gotten from the PHY will be masked to
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* discard any bits which may change based on revision numbers
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* unimportant to functionality
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*
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*/
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struct phy_driver {
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char *name;
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unsigned int uid;
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unsigned int mask;
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unsigned int mmds;
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u32 features;
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/* Called to do any driver startup necessities */
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/* Will be called during phy_connect */
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int (*probe)(struct phy_device *phydev);
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/* Called to configure the PHY, and modify the controller
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* based on the results. Should be called after phy_connect */
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int (*config)(struct phy_device *phydev);
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/* Called when starting up the controller */
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int (*startup)(struct phy_device *phydev);
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/* Called when bringing down the controller */
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int (*shutdown)(struct phy_device *phydev);
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int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
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int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
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u16 val);
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/* Phy specific driver override for reading a MMD register */
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int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
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/* Phy specific driver override for writing a MMD register */
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int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
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u16 val);
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struct list_head list;
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/* driver private data */
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ulong data;
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};
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struct phy_device {
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/* Information about the PHY type */
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/* And management functions */
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struct mii_dev *bus;
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struct phy_driver *drv;
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void *priv;
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#ifdef CONFIG_DM_ETH
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struct udevice *dev;
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ofnode node;
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#else
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struct eth_device *dev;
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#endif
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/* forced speed & duplex (no autoneg)
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* partner speed & duplex & pause (autoneg)
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*/
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int speed;
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int duplex;
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/* The most recently read link state */
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int link;
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int port;
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phy_interface_t interface;
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u32 advertising;
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u32 supported;
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u32 mmds;
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int autoneg;
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int addr;
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int pause;
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int asym_pause;
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u32 phy_id;
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bool is_c45;
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u32 flags;
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};
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struct fixed_link {
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int phy_id;
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int duplex;
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int link_speed;
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int pause;
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int asym_pause;
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};
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/**
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* phy_read - Convenience function for reading a given PHY register
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* @phydev: the phy_device struct
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* @devad: The MMD to read from
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* @regnum: register number to read
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* @return: value for success or negative errno for failure
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*/
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static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
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{
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struct mii_dev *bus = phydev->bus;
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if (!bus || !bus->read) {
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debug("%s: No bus configured\n", __func__);
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return -1;
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}
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return bus->read(bus, phydev->addr, devad, regnum);
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}
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/**
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* phy_write - Convenience function for writing a given PHY register
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* @phydev: the phy_device struct
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* @devad: The MMD to read from
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* @regnum: register number to write
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* @val: value to write to @regnum
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* @return: 0 for success or negative errno for failure
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*/
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static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
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u16 val)
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{
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struct mii_dev *bus = phydev->bus;
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if (!bus || !bus->write) {
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debug("%s: No bus configured\n", __func__);
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return -1;
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}
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return bus->write(bus, phydev->addr, devad, regnum, val);
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}
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/**
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* phy_mmd_start_indirect - Convenience function for writing MMD registers
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* @phydev: the phy_device struct
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* @devad: The MMD to read from
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* @regnum: register number to write
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* @return: None
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*/
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static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
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int regnum)
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{
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/* Write the desired MMD Devad */
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phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
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/* Write the desired MMD register address */
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phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
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/* Select the Function : DATA with no post increment */
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phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
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(devad | MII_MMD_CTRL_NOINCR));
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}
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/**
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* phy_read_mmd - Convenience function for reading a register
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* from an MMD on a given PHY.
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* @phydev: The phy_device struct
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* @devad: The MMD to read from
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* @regnum: The register on the MMD to read
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* @return: Value for success or negative errno for failure
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*/
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static inline int phy_read_mmd(struct phy_device *phydev, int devad,
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int regnum)
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{
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struct phy_driver *drv = phydev->drv;
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if (regnum > (u16)~0 || devad > 32)
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return -EINVAL;
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/* driver-specific access */
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if (drv->read_mmd)
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return drv->read_mmd(phydev, devad, regnum);
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/* direct C45 / C22 access */
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if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
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devad == MDIO_DEVAD_NONE || !devad)
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return phy_read(phydev, devad, regnum);
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/* indirect C22 access */
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phy_mmd_start_indirect(phydev, devad, regnum);
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/* Read the content of the MMD's selected register */
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return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
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}
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/**
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* phy_write_mmd - Convenience function for writing a register
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* on an MMD on a given PHY.
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* @phydev: The phy_device struct
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* @devad: The MMD to read from
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* @regnum: The register on the MMD to read
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* @val: value to write to @regnum
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* @return: 0 for success or negative errno for failure
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*/
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static inline int phy_write_mmd(struct phy_device *phydev, int devad,
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int regnum, u16 val)
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{
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struct phy_driver *drv = phydev->drv;
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if (regnum > (u16)~0 || devad > 32)
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return -EINVAL;
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/* driver-specific access */
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if (drv->write_mmd)
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return drv->write_mmd(phydev, devad, regnum, val);
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/* direct C45 / C22 access */
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if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
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devad == MDIO_DEVAD_NONE || !devad)
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return phy_write(phydev, devad, regnum, val);
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/* indirect C22 access */
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phy_mmd_start_indirect(phydev, devad, regnum);
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/* Write the data into MMD's selected register */
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return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
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}
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/**
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* phy_set_bits_mmd - Convenience function for setting bits in a register
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* on MMD
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* @phydev: the phy_device struct
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* @devad: the MMD containing register to modify
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* @regnum: register number to modify
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* @val: bits to set
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* @return: 0 for success or negative errno for failure
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*/
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static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
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u32 regnum, u16 val)
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{
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int value, ret;
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value = phy_read_mmd(phydev, devad, regnum);
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if (value < 0)
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return value;
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value |= val;
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ret = phy_write_mmd(phydev, devad, regnum, value);
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if (ret < 0)
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return ret;
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return 0;
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}
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/**
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* phy_clear_bits_mmd - Convenience function for clearing bits in a register
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* on MMD
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* @phydev: the phy_device struct
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* @devad: the MMD containing register to modify
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* @regnum: register number to modify
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* @val: bits to clear
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* @return: 0 for success or negative errno for failure
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*/
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static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
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u32 regnum, u16 val)
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{
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int value, ret;
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value = phy_read_mmd(phydev, devad, regnum);
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if (value < 0)
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return value;
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value &= ~val;
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ret = phy_write_mmd(phydev, devad, regnum, value);
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if (ret < 0)
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return ret;
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return 0;
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}
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#ifdef CONFIG_PHYLIB_10G
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extern struct phy_driver gen10g_driver;
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/*
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* List all 10G interfaces here, the assumption being that PHYs on these
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* interfaces are C45
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*/
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static inline int is_10g_interface(phy_interface_t interface)
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{
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return interface == PHY_INTERFACE_MODE_XGMII ||
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interface == PHY_INTERFACE_MODE_USXGMII ||
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interface == PHY_INTERFACE_MODE_10GBASER;
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}
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#endif
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/**
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* phy_init() - Initializes the PHY drivers
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* This function registers all available PHY drivers
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*
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* @return: 0 if OK, -ve on error
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*/
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int phy_init(void);
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/**
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* phy_reset() - Resets the specified PHY
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* Issues a reset of the PHY and waits for it to complete
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*
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* @phydev: PHY to reset
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* @return: 0 if OK, -ve on error
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*/
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int phy_reset(struct phy_device *phydev);
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/**
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* phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
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* The function checks the PHY addresses flagged in phy_mask and returns a
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* phy_device pointer if it detects a PHY.
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* This function should only be called if just one PHY is expected to be present
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* in the set of addresses flagged in phy_mask. If multiple PHYs are present,
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* it is undefined which of these PHYs is returned.
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*
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* @bus: MII/MDIO bus to scan
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* @phy_mask: bitmap of PYH addresses to scan
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* @interface: type of MAC-PHY interface
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* @return: pointer to phy_device if a PHY is found, or NULL otherwise
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*/
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struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
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phy_interface_t interface);
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#ifdef CONFIG_PHY_FIXED
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/**
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* fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
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* @node: OF node for the container of the fixed-link node
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*
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* Description: Creates a struct phy_device based on a fixed-link of_node
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* description. Can be used without phy_connect by drivers which do not expose
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* a UCLASS_ETH udevice.
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*/
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struct phy_device *fixed_phy_create(ofnode node);
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#else
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static inline struct phy_device *fixed_phy_create(ofnode node)
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{
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return NULL;
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}
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#endif
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#ifdef CONFIG_DM_ETH
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/**
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* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
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* @phydev: PHY device
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* @dev: Ethernet device
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*/
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void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
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/**
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* phy_connect() - Creates a PHY device for the Ethernet interface
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* Creates a PHY device for the PHY at the given address, if one doesn't exist
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* already, and associates it with the Ethernet device.
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* The function may be called with addr <= 0, in this case addr value is ignored
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* and the bus is scanned to detect a PHY. Scanning should only be used if only
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* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
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* which PHY is returned.
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*
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* @bus: MII/MDIO bus that hosts the PHY
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* @addr: PHY address on MDIO bus
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* @dev: Ethernet device to associate to the PHY
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* @interface: type of MAC-PHY interface
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* @return: pointer to phy_device if a PHY is found, or NULL otherwise
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*/
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struct phy_device *phy_connect(struct mii_dev *bus, int addr,
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struct udevice *dev,
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phy_interface_t interface);
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/**
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* phy_device_create() - Create a PHY device
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*
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* @bus: MII/MDIO bus that hosts the PHY
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* @addr: PHY address on MDIO bus
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* @phy_id: where to store the ID retrieved
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* @is_c45: Device Identifiers if is_c45
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* @interface: interface between the MAC and PHY
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* @return: pointer to phy_device if a PHY is found, or NULL otherwise
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*/
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struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
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u32 phy_id, bool is_c45,
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phy_interface_t interface);
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/**
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* phy_connect_phy_id() - Connect to phy device by reading PHY id
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* from phy node.
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*
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* @bus: MII/MDIO bus that hosts the PHY
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* @dev: Ethernet device to associate to the PHY
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* @interface: Interface between the MAC and PHY
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* @return: pointer to phy_device if a PHY is found,
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* or NULL otherwise
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*/
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struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
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phy_interface_t interface);
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static inline ofnode phy_get_ofnode(struct phy_device *phydev)
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{
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if (ofnode_valid(phydev->node))
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return phydev->node;
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else
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return dev_ofnode(phydev->dev);
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}
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#else
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/**
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* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
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* @phydev: PHY device
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* @dev: Ethernet device
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*/
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void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
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/**
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* phy_connect() - Creates a PHY device for the Ethernet interface
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* Creates a PHY device for the PHY at the given address, if one doesn't exist
|
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* already, and associates it with the Ethernet device.
|
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* The function may be called with addr <= 0, in this case addr value is ignored
|
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* and the bus is scanned to detect a PHY. Scanning should only be used if only
|
|
* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
|
|
* which PHY is returned.
|
|
*
|
|
* @bus: MII/MDIO bus that hosts the PHY
|
|
* @addr: PHY address on MDIO bus
|
|
* @dev: Ethernet device to associate to the PHY
|
|
* @interface: type of MAC-PHY interface
|
|
* @return: pointer to phy_device if a PHY is found, or NULL otherwise
|
|
*/
|
|
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
|
|
struct eth_device *dev,
|
|
phy_interface_t interface);
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|
|
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static inline ofnode phy_get_ofnode(struct phy_device *phydev)
|
|
{
|
|
return ofnode_null();
|
|
}
|
|
#endif
|
|
int phy_startup(struct phy_device *phydev);
|
|
int phy_config(struct phy_device *phydev);
|
|
int phy_shutdown(struct phy_device *phydev);
|
|
int phy_register(struct phy_driver *drv);
|
|
int phy_set_supported(struct phy_device *phydev, u32 max_speed);
|
|
int genphy_config_aneg(struct phy_device *phydev);
|
|
int genphy_restart_aneg(struct phy_device *phydev);
|
|
int genphy_update_link(struct phy_device *phydev);
|
|
int genphy_parse_link(struct phy_device *phydev);
|
|
int genphy_config(struct phy_device *phydev);
|
|
int genphy_startup(struct phy_device *phydev);
|
|
int genphy_shutdown(struct phy_device *phydev);
|
|
int gen10g_config(struct phy_device *phydev);
|
|
int gen10g_startup(struct phy_device *phydev);
|
|
int gen10g_shutdown(struct phy_device *phydev);
|
|
int gen10g_discover_mmds(struct phy_device *phydev);
|
|
|
|
int phy_b53_init(void);
|
|
int phy_mv88e61xx_init(void);
|
|
int phy_aquantia_init(void);
|
|
int phy_atheros_init(void);
|
|
int phy_broadcom_init(void);
|
|
int phy_cortina_init(void);
|
|
int phy_cortina_access_init(void);
|
|
int phy_davicom_init(void);
|
|
int phy_et1011c_init(void);
|
|
int phy_lxt_init(void);
|
|
int phy_marvell_init(void);
|
|
int phy_micrel_ksz8xxx_init(void);
|
|
int phy_micrel_ksz90x1_init(void);
|
|
int phy_meson_gxl_init(void);
|
|
int phy_natsemi_init(void);
|
|
int phy_nxp_tja11xx_init(void);
|
|
int phy_realtek_init(void);
|
|
int phy_smsc_init(void);
|
|
int phy_teranetics_init(void);
|
|
int phy_ti_init(void);
|
|
int phy_vitesse_init(void);
|
|
int phy_xilinx_init(void);
|
|
int phy_mscc_init(void);
|
|
int phy_fixed_init(void);
|
|
int phy_ncsi_init(void);
|
|
int phy_xilinx_gmii2rgmii_init(void);
|
|
|
|
int board_phy_config(struct phy_device *phydev);
|
|
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
|
|
|
|
/**
|
|
* phy_get_interface_by_name() - Look up a PHY interface name
|
|
*
|
|
* @str: PHY interface name, e.g. "mii"
|
|
* @return: PHY_INTERFACE_MODE_... value, or -1 if not found
|
|
*/
|
|
int phy_get_interface_by_name(const char *str);
|
|
|
|
/**
|
|
* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
|
|
* is RGMII (all variants)
|
|
* @phydev: the phy_device struct
|
|
* @return: true if MII bus is RGMII or false if it is not
|
|
*/
|
|
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
|
|
{
|
|
return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
|
|
phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
|
|
}
|
|
|
|
/**
|
|
* phy_interface_is_sgmii - Convenience function for testing if a PHY interface
|
|
* is SGMII (all variants)
|
|
* @phydev: the phy_device struct
|
|
* @return: true if MII bus is SGMII or false if it is not
|
|
*/
|
|
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
|
|
{
|
|
return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
|
|
phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
|
|
}
|
|
|
|
/* PHY UIDs for various PHYs that are referenced in external code */
|
|
#define PHY_UID_CS4340 0x13e51002
|
|
#define PHY_UID_CS4223 0x03e57003
|
|
#define PHY_UID_TN2020 0x00a19410
|
|
#define PHY_UID_IN112525_S03 0x02107440
|
|
|
|
#endif
|