mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-29 22:43:10 +00:00
d0399a46e7
Synchronise device trees with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
803 lines
20 KiB
Text
803 lines
20 KiB
Text
/*
|
|
* Copyright 2015 Sutajio Ko-Usagi PTE LTD
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This file is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This file is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public
|
|
* License along with this file; if not, write to the Free
|
|
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
|
* MA 02110-1301 USA
|
|
*
|
|
* Or, alternatively,
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use,
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "imx6q.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
model = "Kosagi Novena Dual/Quad";
|
|
compatible = "kosagi,imx6q-novena", "fsl,imx6q";
|
|
|
|
/* Will be filled by the bootloader */
|
|
memory@10000000 {
|
|
device_type = "memory";
|
|
reg = <0x10000000 0>;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = &uart2;
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm1 0 10000000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_backlight_novena>;
|
|
power-supply = <®_lvds_lcd>;
|
|
brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>;
|
|
default-brightness-level = <12>;
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpio_keys_novena>;
|
|
|
|
user-button {
|
|
label = "User Button";
|
|
gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_POWER>;
|
|
};
|
|
|
|
lid {
|
|
label = "Lid";
|
|
gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
|
|
linux,input-type = <5>; /* EV_SW */
|
|
linux,code = <0>; /* SW_LID */
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_leds_novena>;
|
|
|
|
heartbeat {
|
|
label = "novena:white:panel";
|
|
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
|
linux,default-trigger = "default-on";
|
|
};
|
|
};
|
|
|
|
panel: panel {
|
|
compatible = "innolux,n133hse-ea1";
|
|
backlight = <&backlight>;
|
|
};
|
|
|
|
reg_2p5v: regulator-2p5v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "2P5V";
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <2500000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_3p3v: regulator-3p3v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "3P3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_audio_codec: regulator-audio-codec {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "es8328-power";
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
startup-delay-us = <400000>;
|
|
gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_display: regulator-display {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "lcd-display-power";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
startup-delay-us = <200000>;
|
|
gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_lvds_lcd: regulator-lvds-lcd {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "lcd-lvds-power";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_pcie: regulator-pcie {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "pcie-bus-power";
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_sata: regulator-sata {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "sata-power";
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
startup-delay-us = <10000>;
|
|
gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "usb_otg_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
};
|
|
|
|
sound {
|
|
compatible = "fsl,imx-audio-es8328";
|
|
model = "imx-audio-es8328";
|
|
ssi-controller = <&ssi1>;
|
|
audio-codec = <&codec>;
|
|
audio-amp-supply = <®_audio_codec>;
|
|
jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>;
|
|
audio-routing =
|
|
"Speaker", "LOUT2",
|
|
"Speaker", "ROUT2",
|
|
"Speaker", "audio-amp",
|
|
"Headphone", "ROUT1",
|
|
"Headphone", "LOUT1",
|
|
"LINPUT1", "Mic Jack",
|
|
"RINPUT1", "Mic Jack",
|
|
"Mic Jack", "Mic Bias";
|
|
mux-int-port = <0x1>;
|
|
mux-ext-port = <0x3>;
|
|
};
|
|
};
|
|
|
|
&audmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_audmux_novena>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ecspi3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ecspi3_novena>;
|
|
status = "okay";
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet_novena>;
|
|
phy-mode = "rgmii";
|
|
phy-handle = <ðphy>;
|
|
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
|
|
mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
ethphy: ethernet-phy {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
rxc-skew-ps = <3000>;
|
|
rxdv-skew-ps = <0>;
|
|
txc-skew-ps = <3000>;
|
|
txen-skew-ps = <0>;
|
|
rxd0-skew-ps = <0>;
|
|
rxd1-skew-ps = <0>;
|
|
rxd2-skew-ps = <0>;
|
|
rxd3-skew-ps = <0>;
|
|
txd0-skew-ps = <3000>;
|
|
txd1-skew-ps = <3000>;
|
|
txd2-skew-ps = <3000>;
|
|
txd3-skew-ps = <3000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&hdmi {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_hdmi_novena>;
|
|
ddc-i2c-bus = <&i2c2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1_novena>;
|
|
status = "okay";
|
|
|
|
accel: mma8452@1c {
|
|
compatible = "fsl,mma8452";
|
|
reg = <0x1c>;
|
|
};
|
|
|
|
rtc: pcf8523@68 {
|
|
compatible = "nxp,pcf8523";
|
|
reg = <0x68>;
|
|
};
|
|
|
|
sbs_battery: bq20z75@b {
|
|
compatible = "sbs,sbs-battery";
|
|
reg = <0x0b>;
|
|
sbs,i2c-retry-count = <50>;
|
|
};
|
|
|
|
touch: stmpe811@44 {
|
|
compatible = "st,stmpe811";
|
|
reg = <0x44>;
|
|
irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
|
|
id = <0>;
|
|
blocks = <0x5>;
|
|
irq-trigger = <0x1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_stmpe_novena>;
|
|
vio-supply = <®_3p3v>;
|
|
vcc-supply = <®_3p3v>;
|
|
|
|
stmpe_touchscreen {
|
|
compatible = "st,stmpe-ts";
|
|
st,sample-time = <4>;
|
|
st,mod-12b = <1>;
|
|
st,ref-sel = <0>;
|
|
st,adc-freq = <1>;
|
|
st,ave-ctrl = <1>;
|
|
st,touch-det-delay = <2>;
|
|
st,settling = <2>;
|
|
st,fraction-z = <7>;
|
|
st,i-drive = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2_novena>;
|
|
status = "okay";
|
|
|
|
pmic: pfuze100@8 {
|
|
compatible = "fsl,pfuze100";
|
|
reg = <0x08>;
|
|
|
|
regulators {
|
|
reg_sw1a: sw1a {
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1875000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-ramp-delay = <6250>;
|
|
};
|
|
|
|
reg_sw1c: sw1c {
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1875000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_sw2: sw2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_sw3a: sw3a {
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1975000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_sw3b: sw3b {
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1975000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_sw4: sw4 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
reg_swbst: swbst {
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5150000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
reg_snvs: vsnvs {
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vref: vrefddr {
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vgen1: vgen1 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
};
|
|
|
|
reg_vgen2: vgen2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
};
|
|
|
|
reg_vgen3: vgen3 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
reg_vgen4: vgen4 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vgen5: vgen5 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vgen6: vgen6 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3_novena>;
|
|
status = "okay";
|
|
|
|
codec: es8328@11 {
|
|
compatible = "everest,es8328";
|
|
reg = <0x11>;
|
|
DVDD-supply = <®_audio_codec>;
|
|
AVDD-supply = <®_audio_codec>;
|
|
PVDD-supply = <®_audio_codec>;
|
|
HPVDD-supply = <®_audio_codec>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sound_novena>;
|
|
clocks = <&clks IMX6QDL_CLK_CKO1>;
|
|
assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
|
|
<&clks IMX6QDL_CLK_CKO1_SEL>,
|
|
<&clks IMX6QDL_CLK_PLL4_AUDIO>,
|
|
<&clks IMX6QDL_CLK_CKO1>;
|
|
assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>,
|
|
<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
|
|
<&clks IMX6QDL_CLK_OSC>,
|
|
<&clks IMX6QDL_CLK_CKO1_PODF>;
|
|
assigned-clock-rates = <0 0 722534400 22579200>;
|
|
};
|
|
};
|
|
|
|
&kpp {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_kpp_novena>;
|
|
linux,keymap = <
|
|
MATRIX_KEY(1, 1, KEY_CONFIG)
|
|
>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ldb {
|
|
fsl,dual-channel;
|
|
status = "okay";
|
|
|
|
lvds-channel@0 {
|
|
fsl,data-mapping = "jeida";
|
|
fsl,data-width = <24>;
|
|
fsl,panel = <&panel>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie_novena>;
|
|
reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
|
|
vpcie-supply = <®_pcie>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm1 {
|
|
#pwm-cells = <2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
target-supply = <®_sata>;
|
|
fsl,transmit-level-mV = <1025>;
|
|
fsl,transmit-boost-mdB = <0>;
|
|
fsl,transmit-atten-16ths = <8>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2_novena>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3_novena>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4_novena>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
dr_mode = "otg";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg_novena>;
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_swbst>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc2_novena>;
|
|
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
|
bus-width = <4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3_novena>;
|
|
bus-width = <4>;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_audmux_novena: audmuxgrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_backlight_novena: backlightgrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b1
|
|
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi3_novena: ecspi3grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
|
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
|
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet_novena: enetgrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b028
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b028
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b028
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
/* Ethernet reset */
|
|
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_fpga_gpio: fpgagpiogrp-novena {
|
|
fsl,pins = <
|
|
/* FPGA power */
|
|
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1
|
|
/* Reset */
|
|
MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
|
|
/* FPGA GPIOs */
|
|
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b1
|
|
MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b1
|
|
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1
|
|
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b1
|
|
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1
|
|
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1
|
|
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
|
|
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b1
|
|
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b0b1
|
|
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b1
|
|
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b1
|
|
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_fpga_eim: fpgaeimgrp-novena {
|
|
fsl,pins = <
|
|
/* FPGA power */
|
|
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1
|
|
/* Reset */
|
|
MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
|
|
/* FPGA GPIOs */
|
|
MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0f1
|
|
MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0f1
|
|
MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0f1
|
|
MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0f1
|
|
MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0f1
|
|
MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0f1
|
|
MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0f1
|
|
MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0f1
|
|
MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0f1
|
|
MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0f1
|
|
MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0f1
|
|
MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0f1
|
|
MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0f1
|
|
MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0f1
|
|
MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0f1
|
|
MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0f1
|
|
MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0f1
|
|
MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0f1
|
|
MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0f1
|
|
MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0f1
|
|
MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0f1
|
|
MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0f1
|
|
MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0f1
|
|
MX6QDL_PAD_EIM_RW__EIM_RW 0xb0f1
|
|
MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb0f1
|
|
MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0f1
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpio_keys_novena: gpiokeysgrp-novena {
|
|
fsl,pins = <
|
|
/* User button */
|
|
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
|
|
/* PCIe Wakeup */
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1f0e0
|
|
/* Lid switch */
|
|
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_hdmi_novena: hdmigrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
|
|
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1_novena: i2c1grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2_novena: i2c2grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
|
|
MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3_novena: i2c3grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_kpp_novena: kppgrp-novena {
|
|
fsl,pins = <
|
|
/* Front panel button */
|
|
MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x1b0b1
|
|
/* Fake column driver, not connected */
|
|
MX6QDL_PAD_KEY_COL1__KEY_COL1 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_leds_novena: ledsgrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie_novena: pciegrp-novena {
|
|
fsl,pins = <
|
|
/* Reset */
|
|
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1
|
|
/* Power On */
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
|
|
/* Wifi kill */
|
|
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_sata_novena: satagrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_senoko_novena: senokogrp-novena {
|
|
fsl,pins = <
|
|
/* Senoko IRQ line */
|
|
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x13048
|
|
/* Senoko reset line */
|
|
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_sound_novena: soundgrp-novena {
|
|
fsl,pins = <
|
|
/* Audio power regulator */
|
|
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b1
|
|
/* Headphone plug */
|
|
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b1
|
|
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_stmpe_novena: stmpegrp-novena {
|
|
fsl,pins = <
|
|
/* Touchscreen interrupt */
|
|
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2_novena: uart2grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3_novena: uart3grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4_novena: uart4grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg_novena: usbotggrp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_novena: usdhc2grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
|
|
/* Write protect */
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
|
|
/* Card detect */
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_novena: usdhc3grp-novena {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
|
>;
|
|
};
|
|
};
|