mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-26 21:13:48 +00:00
c935d3bd8b
- more documentation for NIOS port
- new struct nios_pio_t, struct nios_spi_t
- Reconfiguration for NIOS Development Kit DK1C20:
o move board related code from board/dk1c20
to board/altera/dk1c20
o create a new common source path board/altera/common
and move generic flash access stuff into it
o change/expand configuration file DK1C20.h
- Add support for NIOS Development Kit DK1S10
- Add status LED support for NIOS systems
- Add dual 7-segment LED support for Altera NIOS DevKits
111 lines
4.3 KiB
C
111 lines
4.3 KiB
C
/*
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* (C) Copyright 2003
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* Denis Peter, d.peter@mpl.ch
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* PLX9096 register definitions
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*/
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#ifndef __PLX9056_H_
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#define __PLX9056_H_ 1
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#include <pci.h>
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#ifdef PLX9056_LOC
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#define LOCAL_OFFSET 0x080
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/* PCI Config regs */
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#else
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#define LOCAL_OFFSET 0x000
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#endif
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#define PCI9056_VENDOR_ID PCI_VENDOR_ID
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/*#define PCI9656_DEVICE_ID PCI_DEVICE_ID */
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#define PCI9056_COMMAND PCI_COMMAND
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/*#define PCI9656_STATUS PCI_STATUS */
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#define PCI9056_REVISION PCI_REVISION_ID
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#define PCI9056_CACHE_SIZE PCI_CACHE_LINE_SIZE
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#define PCI9056_RTR_BASE PCI_BASE_ADDRESS_0
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#define PCI9056_RTR_IO_BASE PCI_BASE_ADDRESS_1
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#define PCI9056_LOCAL_BASE0 PCI_BASE_ADDRESS_2
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#define PCI9056_LOCAL_BASE1 PCI_BASE_ADDRESS_3
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#define PCI9056_UNUSED_BASE1 PCI_BASE_ADDRESS_4
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#define PCI9056_UNUSED_BASE2 PCI_BASE_ADDRESS_5
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#define PCI9056_CIS_PTR PCI_CARDBUS_CIS
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#define PCI9056_SUB_ID PCI_SUBSYSTEM_VENDOR_ID
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#define PCI9056_EXP_ROM_BASE PCI_ROM_ADDRESS
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#define PCI9056_CAP_PTR PCI_CAPABILITY_LIST
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#define PCI9056_INT_LINE PCI_INTERRUPT_LINE
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#if defined(PLX9056_LOC)
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#define PCI9056_PM_CAP_ID 0x180
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#define PCI9056_PM_CSR 0x184
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#define PCI9056_HS_CAP_ID 0x188
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#define PCI9056_VPD_CAP_ID 0x18C
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#define PCI9056_VPD_DATA 0x190
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#endif
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#define PCI_DEVICE_ID_PLX9056 0x9056
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/* Local Configuration Registers Accessible via the PCI Base address + Variable */
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#define PCI9056_SPACE0_RANGE (0x000 + LOCAL_OFFSET)
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#define PCI9056_SPACE0_REMAP (0x004 + LOCAL_OFFSET)
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#define PCI9056_LOCAL_DMA_ARBIT (0x008 + LOCAL_OFFSET)
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#define PCI9056_ENDIAN_DESC (0x00c + LOCAL_OFFSET)
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#define PCI9056_EXP_ROM_RANGE (0x010 + LOCAL_OFFSET)
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#define PCI9056_EXP_ROM_REMAP (0x014 + LOCAL_OFFSET)
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#define PCI9056_SPACE0_ROM_DESC (0x018 + LOCAL_OFFSET)
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#define PCI9056_DM_RANGE (0x01c + LOCAL_OFFSET)
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#define PCI9056_DM_MEM_BASE (0x020 + LOCAL_OFFSET)
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#define PCI9056_DM_IO_BASE (0x024 + LOCAL_OFFSET)
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#define PCI9056_DM_PCI_MEM_REMAP (0x028 + LOCAL_OFFSET)
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#define PCI9056_DM_PCI_IO_CONFIG (0x02c + LOCAL_OFFSET)
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#define PCI9056_SPACE1_RANGE (0x0f0 + LOCAL_OFFSET)
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#define PCI9056_SPACE1_REMAP (0x0f4 + LOCAL_OFFSET)
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#define PCI9056_SPACE1_DESC (0x0f8 + LOCAL_OFFSET)
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#define PCI9056_DM_DAC (0x0fc + LOCAL_OFFSET)
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#ifdef PLX9056_LOC
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#define PCI9056_ARBITER_CTRL 0x1A0
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#define PCI9056_ABORT_ADDRESS 0x1A4
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#endif
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/* Runtime registers PCI Address + LOCAL_OFFSET */
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#ifdef PLX9056_LOC
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#define PCI9056_MAILBOX0 0x0C0
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#define PCI9056_MAILBOX1 0x0C4
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#else
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#define PCI9056_MAILBOX0 0x078
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#define PCI9056_MAILBOX1 0x07c
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#endif
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#define PCI9056_MAILBOX2 (0x048 + LOCAL_OFFSET)
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#define PCI9056_MAILBOX3 (0x04c + LOCAL_OFFSET)
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#define PCI9056_MAILBOX4 (0x050 + LOCAL_OFFSET)
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#define PCI9056_MAILBOX5 (0x054 + LOCAL_OFFSET)
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#define PCI9056_MAILBOX6 (0x058 + LOCAL_OFFSET)
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#define PCI9056_MAILBOX7 (0x05c + LOCAL_OFFSET)
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#define PCI9056_PCI_TO_LOC_DBELL (0x060 + LOCAL_OFFSET)
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#define PCI9056_LOC_TO_PCI_DBELL (0x064 + LOCAL_OFFSET)
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#define PCI9056_INT_CTRL_STAT (0x068 + LOCAL_OFFSET)
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#define PCI9056_EEPROM_CTRL_STAT (0x06c + LOCAL_OFFSET)
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#define PCI9056_PERM_VENDOR_ID (0x070 + LOCAL_OFFSET)
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#define PCI9056_REVISION_ID (0x074 + LOCAL_OFFSET)
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#endif /* #ifndef __PLX9056_H_ */
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