mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 17:07:38 +00:00
1e85ccec53
Fixed the prom_relocate() function in start.S file by reserving memory in the board_init_f sequence and saving the offset to the __prom_start_reloc variable. This value is used as the destination when relocating the PROM. Add the prom_init() function to the end of the board_init_r sequence. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
681 lines
17 KiB
ArmAsm
681 lines
17 KiB
ArmAsm
/* This is where the SPARC/LEON3 starts
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*
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* Copyright (C) 2007, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include <asm/asmmacro.h>
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#include <asm/winmacro.h>
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#include <asm/psr.h>
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#include <asm/stack.h>
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#include <asm/leon.h>
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#include <ambapp.h>
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/* Default Plug&Play I/O area */
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#ifndef CONFIG_AMBAPP_IOAREA
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#define CONFIG_AMBAPP_IOAREA AMBA_DEFAULT_IOAREA
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#endif
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/* Default number of SPARC register windows */
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#ifndef CONFIG_SYS_SPARC_NWINDOWS
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#define CONFIG_SYS_SPARC_NWINDOWS 8
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#endif
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/* Entry for traps which jump to a programmer-specified trap handler. */
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#define TRAPR(H) \
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wr %g0, 0xfe0, %psr; \
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mov %g0, %tbr; \
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ba (H); \
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mov %g0, %wim;
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#define TRAP(H) \
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mov %psr, %l0; \
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ba (H); \
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nop; nop;
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#define TRAPI(ilevel) \
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mov ilevel, %l7; \
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mov %psr, %l0; \
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b _irq_entry; \
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mov %wim, %l3
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/* Unexcpected trap will halt the processor by forcing it to error state */
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#undef BAD_TRAP
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#define BAD_TRAP ta 0; nop; nop; nop;
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/* Software trap. Treat as BAD_TRAP for the time being... */
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#define SOFT_TRAP TRAP(_hwerr)
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#define PSR_INIT 0x1FC0 /* Disable traps, set s and ps */
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#define WIM_INIT 2
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/* All traps low-level code here must end with this macro. */
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#define RESTORE_ALL b ret_trap_entry; clr %l6;
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#define WRITE_PAUSE nop;nop;nop
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WINDOWSIZE = (16 * 4)
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ARGPUSHSIZE = (6 * 4)
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ARGPUSH = (WINDOWSIZE + 4)
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MINFRAME = (WINDOWSIZE + ARGPUSHSIZE + 4)
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/* Number of register windows */
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#ifndef CONFIG_SYS_SPARC_NWINDOWS
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#error Must define number of SPARC register windows, default is 8
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#endif
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/* Macros to load address into a register. Uses GOT table for PIC */
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#ifdef __PIC__
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#define SPARC_PIC_THUNK_CALL(reg) \
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sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %##reg; \
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call __sparc_get_pc_thunk.reg; \
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add %##reg, %pc10(_GLOBAL_OFFSET_TABLE_+4), %##reg;
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#define SPARC_LOAD_ADDRESS(sym, got, reg) \
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sethi %gdop_hix22(sym), %##reg; \
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xor %##reg, %gdop_lox10(sym), %##reg; \
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ld [%##got + %##reg], %##reg, %gdop(sym);
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#else
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#define SPARC_PIC_THUNK_CALL(reg)
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#define SPARC_LOAD_ADDRESS(sym, got, tmp) \
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set sym, %##reg;
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#endif
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#define STACK_ALIGN 8
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#define SA(X) (((X)+(STACK_ALIGN-1)) & ~(STACK_ALIGN-1))
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.section ".start", "ax"
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.globl _start, start, _trap_table
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.globl _irq_entry, nmi_trap
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.globl _reset_reloc
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/* at address 0
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* Hardware traps
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*/
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start:
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_start:
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_trap_table:
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TRAPR(_hardreset); ! 00 reset trap
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BAD_TRAP; ! 01 instruction_access_exception
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BAD_TRAP; ! 02 illegal_instruction
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BAD_TRAP; ! 03 priveleged_instruction
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BAD_TRAP; ! 04 fp_disabled
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TRAP(_window_overflow); ! 05 window_overflow
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TRAP(_window_underflow); ! 06 window_underflow
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BAD_TRAP; ! 07 Memory Address Not Aligned
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BAD_TRAP; ! 08 Floating Point Exception
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BAD_TRAP; ! 09 Data Miss Exception
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BAD_TRAP; ! 0a Tagged Instruction Ovrflw
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BAD_TRAP; ! 0b Watchpoint Detected
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BAD_TRAP; ! 0c
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BAD_TRAP; ! 0d
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BAD_TRAP; ! 0e
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BAD_TRAP; ! 0f
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BAD_TRAP; ! 10
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TRAPI(1); ! 11 IRQ level 1
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TRAPI(2); ! 12 IRQ level 2
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TRAPI(3); ! 13 IRQ level 3
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TRAPI(4); ! 14 IRQ level 4
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TRAPI(5); ! 15 IRQ level 5
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TRAPI(6); ! 16 IRQ level 6
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TRAPI(7); ! 17 IRQ level 7
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TRAPI(8); ! 18 IRQ level 8
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TRAPI(9); ! 19 IRQ level 9
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TRAPI(10); ! 1a IRQ level 10
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TRAPI(11); ! 1b IRQ level 11
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TRAPI(12); ! 1c IRQ level 12
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TRAPI(13); ! 1d IRQ level 13
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TRAPI(14); ! 1e IRQ level 14
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TRAP(_nmi_trap); ! 1f IRQ level 15 /
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! NMI (non maskable interrupt)
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BAD_TRAP; ! 20 r_register_access_error
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BAD_TRAP; ! 21 instruction access error
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BAD_TRAP; ! 22
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BAD_TRAP; ! 23
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BAD_TRAP; ! 24 co-processor disabled
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BAD_TRAP; ! 25 uniplemented FLUSH
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BAD_TRAP; ! 26
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BAD_TRAP; ! 27
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BAD_TRAP; ! 28 co-processor exception
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BAD_TRAP; ! 29 data access error
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BAD_TRAP; ! 2a division by zero
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BAD_TRAP; ! 2b data store error
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BAD_TRAP; ! 2c data access MMU miss
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BAD_TRAP; ! 2d
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BAD_TRAP; ! 2e
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BAD_TRAP; ! 2f
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 30-33
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 34-37
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 38-3b
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 3c-3f
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 40-43
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 44-47
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 48-4b
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 4c-4f
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 50-53
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 54-57
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 58-5b
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 5c-5f
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/* implementaion dependent */
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 60-63
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 64-67
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 68-6b
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 6c-6f
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 70-73
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74-77
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78-7b
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 7c-7f
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/* Software traps, not handled */
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 80-83
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84-87
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 88-8b
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8c-8f
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90-93
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94-97
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 98-9b
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 9c-9f
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! a0-a3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! a4-a7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! a8-ab
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! ac-af
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! b0-b3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! b4-b7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! b8-bb
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! bc-bf
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! c0-c3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! c4-c7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! c8-cb
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! cc-cf
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! d0-d3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! d4-d7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! d8-db
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! dc-df
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! e0-e3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! e4-e7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! e8-eb
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! ec-ef
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! f0-f3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! f4-f7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! f8-fb
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! fc-ff
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.section ".text"
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.extern _nomem_amba_init, _nomem_memory_ctrl_init
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.align 4
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_hardreset:
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1000:
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flush
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/* Enable I/D-Cache and Snooping */
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set 0x0081000f, %g2
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sta %g2, [%g0] 2
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mov %g0, %y
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clr %g1
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clr %g2
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clr %g3
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clr %g4
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clr %g5
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clr %g6
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clr %g7
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mov %asr17, %g3
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and %g3, 0x1f, %g3
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clear_window:
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mov %g0, %l0
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mov %g0, %l1
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mov %g0, %l2
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mov %g0, %l3
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mov %g0, %l4
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mov %g0, %l5
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mov %g0, %l6
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mov %g0, %l7
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mov %g0, %o0
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mov %g0, %o1
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mov %g0, %o2
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mov %g0, %o3
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mov %g0, %o4
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mov %g0, %o5
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mov %g0, %o6
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mov %g0, %o7
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subcc %g3, 1, %g3
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bge clear_window
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save
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wiminit:
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set WIM_INIT, %g3
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mov %g3, %wim
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stackinit:
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set CONFIG_SYS_INIT_SP_OFFSET, %fp
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andn %fp, 0x0f, %fp
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sub %fp, 64, %sp
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tbrinit:
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set CONFIG_SYS_TEXT_BASE, %g2
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wr %g0, %g2, %tbr
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nop
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nop
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nop
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/* Obtain the address of _GLOBAL_OFFSET_TABLE_ */
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SPARC_PIC_THUNK_CALL(l7)
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/* Scan AMBA Bus for AMBA buses using PnP information. All found
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* AMBA buses I/O area will be located in i0-i5 upon return.
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* The i0-i5 registers are later used by _nomem_amba_init2
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*/
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ambainit:
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call _nomem_amba_init
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sethi %hi(CONFIG_AMBAPP_IOAREA), %o0
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/* Scan AMBA Buses for memory controllers, then initialize the
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* memory controllers. Note that before setting up the memory controller
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* the stack can not be used.
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*/
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memory_ctrl_init:
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SPARC_LOAD_ADDRESS(grlib_mctrl_handlers, l7, o0)
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call _nomem_memory_ctrl_init
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nop
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/* The return valu indicate how many memory controllers where found and
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* initialized, if no memory controller was initialized, we can not continue
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* because from here on we expect memory to be working.
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*/
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cmp %o0, 0
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memory_ctrl_init_failed:
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beq memory_ctrl_init_failed
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nop
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/*** From now on the stack can be used. ***/
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cpu_init_unreloc:
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call cpu_init_f
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nop
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board_init_unreloc:
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call board_init_f
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clr %o0 ! boot_flags
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dead_unreloc:
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mov 1, %g1 ! For GRMON2 to exit normally.
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ta 0 ! If board_init_f call returns.. (unlikely)
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nop
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nop
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ba dead_unreloc ! infinte loop
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nop
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!-------------------------------------------------------------------------------
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/* void relocate_code (addr_sp, gd, addr_moni)
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*
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* This "function" does not return, instead it continues in RAM after
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* relocating the monitor code.
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*
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* %o0 = Relocated stack pointer
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* %o1 = Relocated global data pointer
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* %o2 = Relocated text pointer
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*
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* %l7 = _GLOBAL_OFFSET_TABLE_ address
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*/
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.globl relocate_code
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.type relocate_code, #function
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.align 4
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relocate_code:
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!SPARC_PIC_THUNK_CALL(l7)
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reloc:
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SPARC_LOAD_ADDRESS(_text, l7, g2) ! start address of monitor
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SPARC_LOAD_ADDRESS(__init_end, l7, g3) ! end address of monitor
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mov %o2, %g4 ! relocation address
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sub %g4, %g2, %g6 ! relocation offset
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/* copy .text & .data to relocated address */
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10: ldd [%g2], %l0
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ldd [%g2+8], %l2
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std %l0, [%g4]
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std %l2, [%g4+8]
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inc 16, %g2 ! src += 16
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cmp %g2, %g3
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bcs 10b ! while (src < end)
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inc 16, %g4 ! dst += 16
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clr %l0
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clr %l1
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clr %l2
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clr %l3
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clr %g2
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/* register g4 contain address to start
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* This means that BSS must be directly after data and code segments
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*
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* g3 is length of bss = (__bss_end-__bss_start)
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*
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*/
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/* clear the relocated .bss area */
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clr_bss:
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SPARC_LOAD_ADDRESS(__bss_start, l7, g2)
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SPARC_LOAD_ADDRESS(__bss_end, l7, g3)
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sub %g3,%g2,%g3 ! length of .bss area
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add %g3,%g4,%g3
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/* clearing 16byte a time ==> linker script need to align to 16 byte offset */
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clr %g1 /* std %g0 uses g0 and g1 */
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20:
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std %g0, [%g4]
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std %g0, [%g4+8]
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inc 16, %g4 ! ptr += 16
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cmp %g4, %g3
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bcs 20b ! while (ptr < end)
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nop
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/* add offsets to GOT table */
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fixup_got:
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SPARC_LOAD_ADDRESS(__got_start, l7, g4)
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add %g4, %g6, %g4
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SPARC_LOAD_ADDRESS(__got_end, l7, g3)
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add %g3, %g6, %g3
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30: ld [%g4], %l0
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#ifdef CONFIG_RELOC_GOT_SKIP_NULL
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cmp %l0, 0
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be 32f
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#endif
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add %l0, %g6, %l0 ! relocate GOT pointer
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st %l0, [%g4]
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32: inc 4, %g4 ! ptr += 4
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cmp %g4, %g3
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bcs 30b ! while (ptr < end)
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nop
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prom_relocate:
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SPARC_LOAD_ADDRESS(__prom_start, l7, g2)
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SPARC_LOAD_ADDRESS(__prom_end, l7, g3)
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/*
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* Calculated addres is stored in this variable by
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* reserve_prom() function in common/board_f.c
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*/
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SPARC_LOAD_ADDRESS(__prom_start_reloc, l7, g4)
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ld [%g4], %g4
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40: ldd [%g2], %l0
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ldd [%g2+8], %l2
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std %l0, [%g4]
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std %l2, [%g4+8]
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inc 16, %g2
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cmp %g2, %g3
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bcs 40b
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inc 16, %g4
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! %o0 = stack pointer (relocated)
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! %o1 = global data pointer (relocated)
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! %o2 = text pointer (relocated)
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! %g6 = relocation offset
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! %l7 = _GLOBAL_OFFSET_TABLE_
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/* Trap table has been moved, lets tell CPU about
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* the new trap table address
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*/
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update_trap_table_address:
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wr %g0, %o2, %tbr
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nop
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nop
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nop
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update_stack_pointers:
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mov %o0, %fp
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andn %fp, 0x0f, %fp ! align to 16 bytes
|
|
add %fp, -64, %fp ! make space for a window push
|
|
mov %fp, %sp ! setup stack pointer
|
|
|
|
jump_board_init_r:
|
|
mov %o1, %o0 ! relocated global data pointer
|
|
mov %o2, %o1 ! relocated text pointer
|
|
SPARC_LOAD_ADDRESS(board_init_r, l7, o3)
|
|
add %o3, %g6, %o3 ! add relocation offset
|
|
call %o3
|
|
nop
|
|
|
|
dead:
|
|
mov 1, %g1 ! For GRMON2 to exit normally.
|
|
ta 0 ! if call returns.. (unlikely)
|
|
nop
|
|
b dead ! infinte loop
|
|
nop
|
|
|
|
!------------------------------------------------------------------------------
|
|
|
|
/* Interrupt handler caller,
|
|
* reg L7: interrupt number
|
|
* reg L0: psr after interrupt
|
|
* reg L1: PC
|
|
* reg L2: next PC
|
|
* reg L3: wim
|
|
*/
|
|
_irq_entry:
|
|
SAVE_ALL
|
|
|
|
or %l0, PSR_PIL, %g2
|
|
wr %g2, 0x0, %psr
|
|
WRITE_PAUSE
|
|
wr %g2, PSR_ET, %psr
|
|
WRITE_PAUSE
|
|
mov %l7, %o0 ! irq level
|
|
set handler_irq, %o1
|
|
set (CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o2
|
|
add %o1, %o2, %o1
|
|
call %o1
|
|
add %sp, SF_REGS_SZ, %o1 ! pt_regs ptr
|
|
or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
|
|
wr %g2, PSR_ET, %psr ! keep ET up
|
|
WRITE_PAUSE
|
|
|
|
RESTORE_ALL
|
|
|
|
!------------------------------------------------------------------------------
|
|
|
|
/*
|
|
* Window overflow trap handler
|
|
*/
|
|
.global _window_overflow
|
|
|
|
_window_overflow:
|
|
|
|
mov %wim, %l3 ! Calculate next WIM
|
|
mov %g1, %l7
|
|
srl %l3, 1, %g1
|
|
sll %l3, (CONFIG_SYS_SPARC_NWINDOWS-1), %l4
|
|
or %g1, %l4, %g1
|
|
save ! Get into window to be saved.
|
|
mov %g1, %wim
|
|
nop; nop; nop
|
|
st %l0, [%sp + 0] ! Save window to the stack
|
|
st %l1, [%sp + 4]
|
|
st %l2, [%sp + 8]
|
|
st %l3, [%sp + 12]
|
|
st %l4, [%sp + 16]
|
|
st %l5, [%sp + 20]
|
|
st %l6, [%sp + 24]
|
|
st %l7, [%sp + 28]
|
|
st %i0, [%sp + 32]
|
|
st %i1, [%sp + 36]
|
|
st %i2, [%sp + 40]
|
|
st %i3, [%sp + 44]
|
|
st %i4, [%sp + 48]
|
|
st %i5, [%sp + 52]
|
|
st %i6, [%sp + 56]
|
|
st %i7, [%sp + 60]
|
|
restore ! Go back to trap window.
|
|
mov %l7, %g1
|
|
jmp %l1 ! Re-execute save.
|
|
rett %l2
|
|
|
|
/*
|
|
* Window underflow trap handler
|
|
*/
|
|
.global _window_underflow
|
|
|
|
_window_underflow:
|
|
|
|
mov %wim, %l3 ! Calculate next WIM
|
|
srl %l3, (CONFIG_SYS_SPARC_NWINDOWS-1), %l5
|
|
sll %l3, 1, %l4
|
|
or %l5, %l4, %l5
|
|
mov %l5, %wim
|
|
nop; nop; nop
|
|
restore ! Two restores to get into the
|
|
restore ! window to restore
|
|
ld [%sp + 0], %l0; ! Restore window from the stack
|
|
ld [%sp + 4], %l1;
|
|
ld [%sp + 8], %l2;
|
|
ld [%sp + 12], %l3;
|
|
ld [%sp + 16], %l4;
|
|
ld [%sp + 20], %l5;
|
|
ld [%sp + 24], %l6;
|
|
ld [%sp + 28], %l7;
|
|
ld [%sp + 32], %i0;
|
|
ld [%sp + 36], %i1;
|
|
ld [%sp + 40], %i2;
|
|
ld [%sp + 44], %i3;
|
|
ld [%sp + 48], %i4;
|
|
ld [%sp + 52], %i5;
|
|
ld [%sp + 56], %i6;
|
|
ld [%sp + 60], %i7;
|
|
save ! Get back to the trap window.
|
|
save
|
|
jmp %l1 ! Re-execute restore.
|
|
rett %l2
|
|
|
|
!------------------------------------------------------------------------------
|
|
|
|
_nmi_trap:
|
|
nop
|
|
jmp %l1
|
|
rett %l2
|
|
|
|
_hwerr:
|
|
ta 0
|
|
nop
|
|
nop
|
|
b _hwerr ! loop infinite
|
|
nop
|
|
|
|
/* Registers to not touch at all. */
|
|
#define t_psr l0 /* Set by caller */
|
|
#define t_pc l1 /* Set by caller */
|
|
#define t_npc l2 /* Set by caller */
|
|
#define t_wim l3 /* Set by caller */
|
|
#define t_twinmask l4 /* Set at beginning of this entry routine. */
|
|
#define t_kstack l5 /* Set right before pt_regs frame is built */
|
|
#define t_retpc l6 /* If you change this, change winmacro.h header file */
|
|
#define t_systable l7 /* Never touch this, could be the syscall table ptr. */
|
|
#define curptr g6 /* Set after pt_regs frame is built */
|
|
|
|
trap_setup:
|
|
/* build a pt_regs trap frame. */
|
|
sub %fp, (SF_REGS_SZ + PT_REGS_SZ), %t_kstack
|
|
PT_STORE_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
|
|
|
|
/* See if we are in the trap window. */
|
|
mov 1, %t_twinmask
|
|
sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
|
|
andcc %t_twinmask, %t_wim, %g0
|
|
beq 1f ! in trap window, clean up
|
|
nop
|
|
|
|
/*-------------------------------------------------
|
|
* Spill , adjust %wim and go.
|
|
*/
|
|
srl %t_wim, 0x1, %g2 ! begin computation of new %wim
|
|
|
|
set (CONFIG_SYS_SPARC_NWINDOWS-1), %g3 !NWINDOWS-1
|
|
|
|
sll %t_wim, %g3, %t_wim ! NWINDOWS-1
|
|
or %t_wim, %g2, %g2
|
|
and %g2, 0xff, %g2
|
|
|
|
save %g0, %g0, %g0 ! get in window to be saved
|
|
|
|
/* Set new %wim value */
|
|
wr %g2, 0x0, %wim
|
|
|
|
/* Save the kernel window onto the corresponding stack. */
|
|
RW_STORE(sp)
|
|
|
|
restore %g0, %g0, %g0
|
|
/*-------------------------------------------------*/
|
|
|
|
1:
|
|
/* Trap from kernel with a window available.
|
|
* Just do it...
|
|
*/
|
|
jmpl %t_retpc + 0x8, %g0 ! return to caller
|
|
mov %t_kstack, %sp ! jump onto new stack
|
|
|
|
#define twin_tmp1 l4
|
|
#define glob_tmp g4
|
|
#define curptr g6
|
|
ret_trap_entry:
|
|
wr %t_psr, 0x0, %psr ! enable nesting again, clear ET
|
|
|
|
/* Will the rett land us in the invalid window? */
|
|
mov 2, %g1
|
|
sll %g1, %t_psr, %g1
|
|
|
|
set CONFIG_SYS_SPARC_NWINDOWS, %g2 !NWINDOWS
|
|
|
|
srl %g1, %g2, %g2
|
|
or %g1, %g2, %g1
|
|
rd %wim, %g2
|
|
andcc %g2, %g1, %g0
|
|
be 1f ! Nope, just return from the trap
|
|
sll %g2, 0x1, %g1
|
|
|
|
/* We have to grab a window before returning. */
|
|
set (CONFIG_SYS_SPARC_NWINDOWS-1), %g3 !NWINDOWS-1
|
|
|
|
srl %g2, %g3, %g2
|
|
or %g1, %g2, %g1
|
|
and %g1, 0xff, %g1
|
|
|
|
wr %g1, 0x0, %wim
|
|
|
|
/* Grrr, make sure we load from the right %sp... */
|
|
PT_LOAD_ALL(sp, t_psr, t_pc, t_npc, g1)
|
|
|
|
restore %g0, %g0, %g0
|
|
RW_LOAD(sp)
|
|
b 2f
|
|
save %g0, %g0, %g0
|
|
|
|
/* Reload the entire frame in case this is from a
|
|
* kernel system call or whatever...
|
|
*/
|
|
1:
|
|
PT_LOAD_ALL(sp, t_psr, t_pc, t_npc, g1)
|
|
2:
|
|
wr %t_psr, 0x0, %psr
|
|
nop;
|
|
nop;
|
|
nop
|
|
|
|
jmp %t_pc
|
|
rett %t_npc
|
|
|
|
/* This is called from relocated C-code.
|
|
* It resets the system by jumping to _start
|
|
*/
|
|
_reset_reloc:
|
|
set start, %l0
|
|
call %l0
|
|
nop
|