Chris Packham 0d0df46ee7 arm: mvebu: Add Marvell's integrated CPUs ... Marvell's switch chips with integrated CPUs (collectively referred to as MSYS) share common ancestry with the Armada SoCs. Some of the IP blocks (e.g. xor) are located at different addresses and DFX server exists as a separate target on the MBUS (on Armada-38x it's just part of the core complex registers). Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>		2019-04-12 07:04:18 +02:00
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a38x	mv_ddr: ddr3: only use active chip-selects when tuning ODT	2019-03-19 09:22:05 +01:00
axp	arm: mvebu: Add Marvell's integrated CPUs	2019-04-12 07:04:18 +02:00