mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 07:57:21 +00:00
9ae600e9e2
Sync these files, obtained from Linux v5.15. This adds a devicetree file for rpi_4 which was not there before. Testing shows no change so far as I can see: - boots to U-Boot prompt on rpi0, rpi2 - boots to distro on rpi3 - boots to distro on rpi4 I am assuming that syncing with Linux is safe, but the maintainer should know for sure. Signed-off-by: Simon Glass <sjg@chromium.org>
92 lines
2 KiB
Text
92 lines
2 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
#include "bcm283x.dtsi"
|
|
#include "bcm2835-common.dtsi"
|
|
#include "bcm2835-rpi-common.dtsi"
|
|
|
|
/ {
|
|
compatible = "brcm,bcm2836";
|
|
|
|
soc {
|
|
ranges = <0x7e000000 0x3f000000 0x1000000>,
|
|
<0x40000000 0x40000000 0x00001000>;
|
|
dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
|
|
|
|
local_intc: local_intc@40000000 {
|
|
compatible = "brcm,bcm2836-l1-intc";
|
|
reg = <0x40000000 0x100>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
interrupt-parent = <&local_intc>;
|
|
};
|
|
};
|
|
|
|
arm-pmu {
|
|
compatible = "arm,cortex-a7-pmu";
|
|
interrupt-parent = <&local_intc>;
|
|
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
timer {
|
|
compatible = "arm,armv7-timer";
|
|
interrupt-parent = <&local_intc>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
|
|
<1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
|
|
<3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
|
|
<2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
|
|
always-on;
|
|
};
|
|
|
|
cpus: cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
enable-method = "brcm,bcm2836-smp";
|
|
|
|
v7_cpu0: cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a7";
|
|
reg = <0xf00>;
|
|
clock-frequency = <800000000>;
|
|
};
|
|
|
|
v7_cpu1: cpu@1 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a7";
|
|
reg = <0xf01>;
|
|
clock-frequency = <800000000>;
|
|
};
|
|
|
|
v7_cpu2: cpu@2 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a7";
|
|
reg = <0xf02>;
|
|
clock-frequency = <800000000>;
|
|
};
|
|
|
|
v7_cpu3: cpu@3 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a7";
|
|
reg = <0xf03>;
|
|
clock-frequency = <800000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* Make the BCM2835-style global interrupt controller be a child of the
|
|
* CPU-local interrupt controller.
|
|
*/
|
|
&intc {
|
|
compatible = "brcm,bcm2836-armctrl-ic";
|
|
reg = <0x7e00b200 0x200>;
|
|
interrupt-parent = <&local_intc>;
|
|
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
&cpu_thermal {
|
|
coefficients = <(-538) 407000>;
|
|
};
|
|
|
|
/* enable thermal sensor with the correct compatible property set */
|
|
&thermal {
|
|
compatible = "brcm,bcm2836-thermal";
|
|
status = "okay";
|
|
};
|