mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 07:57:21 +00:00
5d4d1212f7
Replace it by including of mvebu-u-boot.dtsi file. When board does not use -u-boot.dtsi then mvebu-u-boot.dtsi is included automatically by makefile scripts/Makefile.lib. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
143 lines
2.2 KiB
Text
143 lines
2.2 KiB
Text
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
|
/*
|
|
* Device Tree file for Marvell Armada 385 AMC board
|
|
* (DB-88F6820-AMC)
|
|
*
|
|
* Copyright (C) 2017 Allied Telesis Labs
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "armada-385.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "Marvell Armada 385 AMC";
|
|
compatible = "marvell,a385-db-amc", "marvell,armada385", "marvell,armada380";
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = ð0;
|
|
ethernet1 = ð2;
|
|
i2c0 = &i2c0;
|
|
spi1 = &spi1;
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x80000000>; /* 2GB */
|
|
};
|
|
|
|
soc {
|
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
|
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
|
};
|
|
};
|
|
|
|
&i2c0 {
|
|
u-boot,i2c-slave-addr = <0x0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart0 {
|
|
/*
|
|
* Exported on the micro USB connector CON3
|
|
* through an FTDI
|
|
*/
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
|
|
ð0 {
|
|
pinctrl-names = "default";
|
|
/*
|
|
* The Reference Clock 0 is used to provide a
|
|
* clock to the PHY
|
|
*/
|
|
pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
|
|
status = "okay";
|
|
phy = <&phy0>;
|
|
phy-mode = "rgmii-id";
|
|
};
|
|
|
|
ð2 {
|
|
status = "okay";
|
|
phy = <&phy1>;
|
|
phy-mode = "sgmii";
|
|
};
|
|
|
|
&usb0 {
|
|
status = "okay";
|
|
};
|
|
|
|
|
|
|
|
&mdio {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mdio_pins>;
|
|
|
|
phy0: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
|
|
phy1: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&nand_controller {
|
|
status = "okay";
|
|
marvell,nand-keep-config;
|
|
marvell,nand-enable-arbiter;
|
|
nand-on-flash-bbt;
|
|
};
|
|
|
|
&pciec {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie1 {
|
|
/* Port 0, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
|
|
&spi1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_pins>;
|
|
status = "okay";
|
|
|
|
spi-flash@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>; /* Chip select 0 */
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
partition@0 {
|
|
reg = <0x00000000 0x00100000>;
|
|
label = "u-boot";
|
|
};
|
|
partition@100000 {
|
|
reg = <0x00100000 0x00040000>;
|
|
label = "u-boot-env";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&refclk {
|
|
clock-frequency = <20000000>;
|
|
};
|