mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2002
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*/
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#ifndef _SPARTAN2_H_
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#define _SPARTAN2_H_
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#include <xilinx.h>
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/* Slave Parallel Implementation function table */
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typedef struct {
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xilinx_pre_fn pre;
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xilinx_pgm_fn pgm;
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xilinx_init_fn init;
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xilinx_err_fn err;
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xilinx_done_fn done;
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xilinx_clk_fn clk;
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xilinx_cs_fn cs;
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xilinx_wr_fn wr;
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xilinx_rdata_fn rdata;
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xilinx_wdata_fn wdata;
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xilinx_busy_fn busy;
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xilinx_abort_fn abort;
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xilinx_post_fn post;
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} xilinx_spartan2_slave_parallel_fns;
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/* Slave Serial Implementation function table */
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typedef struct {
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xilinx_pre_fn pre;
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xilinx_pgm_fn pgm;
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xilinx_clk_fn clk;
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xilinx_init_fn init;
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xilinx_done_fn done;
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xilinx_wr_fn wr;
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xilinx_post_fn post;
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} xilinx_spartan2_slave_serial_fns;
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#if defined(CONFIG_FPGA_SPARTAN2)
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extern struct xilinx_fpga_op spartan2_op;
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# define FPGA_SPARTAN2_OPS &spartan2_op
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#else
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# define FPGA_SPARTAN2_OPS NULL
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#endif
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/* Device Image Sizes
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*********************************************************************/
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/* Spartan-II (2.5V) */
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#define XILINX_XC2S15_SIZE 197728/8
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#define XILINX_XC2S30_SIZE 336800/8
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#define XILINX_XC2S50_SIZE 559232/8
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#define XILINX_XC2S100_SIZE 781248/8
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#define XILINX_XC2S150_SIZE 1040128/8
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#define XILINX_XC2S200_SIZE 1335872/8
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/* Spartan-IIE (1.8V) */
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#define XILINX_XC2S50E_SIZE 630048/8
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#define XILINX_XC2S100E_SIZE 863840/8
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#define XILINX_XC2S150E_SIZE 1134496/8
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#define XILINX_XC2S200E_SIZE 1442016/8
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#define XILINX_XC2S300E_SIZE 1875648/8
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/* Descriptor Macros
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*********************************************************************/
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/* Spartan-II devices */
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#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
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{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, \
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FPGA_SPARTAN2_OPS }
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#endif /* _SPARTAN2_H_ */
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