u-boot/drivers/ddr/marvell/a38x
Marek Behún a163db9fba ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision
In commit 3fc92a215b ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
decision") I ported a cleaned up and changed version of patch
  mv_ddr: a380: fix SPLIT_OUT_MIX state decision

In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
because:
- the fix seemed to work without it
- the bit was checked for only at one place out of two, while the second
  bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
- without the removal it didn't work on Allied Telesis' x530 board

We recently had a chance to test on more boards, and it seems that the
change needs to be opposite: instead of removing the check for
BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
needs to be added also to the second one - it needs to be at both
places.

With this change all the Turris Omnia boards I have had available to
test seem to work, I didn't encounter not even one failed DDR training.

As last time, I am noting that I do not understand what this code is
actually doing, I haven't studied the DDR training algorithm and
I suspect that no one will be able to explain it to U-Boot contributors,
so we are left with this blind poking in the code with testing whether
it works on several boards and hoping it doesn't break anything for
anyone :-(.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
..
ddr3_debug.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_init.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_init.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_logging_def.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_patterns_64bit.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_training.c WS cleanup: remove trailing empty lines 2021-09-30 08:08:56 -04:00
ddr3_training_bist.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_centralization.c ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision 2022-02-17 14:17:07 +01:00
ddr3_training_db.c ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit 2021-02-26 10:22:29 +01:00
ddr3_training_hw_algo.c mv_ddr: ddr3: Update {min,max}_read_sample calculation 2020-07-09 06:49:44 +02:00
ddr3_training_hw_algo.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ddr3_training_ip.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_bist.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_training_ip_centralization.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ddr3_training_ip_db.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_training_ip_def.h ddr: marvell: a38x: add 16Gbit memory devices support 2021-02-26 10:22:29 +01:00
ddr3_training_ip_engine.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_training_ip_engine.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_flow.h ARM: mvebu: a38x: Correct mismatched bound warnings 2021-07-07 10:17:54 -04:00
ddr3_training_ip_pbs.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ddr3_training_ip_prv_if.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_leveling.c arm: mvebu: a38x: Remove dead code ARMADA_39X 2021-03-12 07:44:21 +01:00
ddr3_training_leveling.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_pbs.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr_ml_wrapper.h ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr_topology_def.h ddr: marvell: a38x: enum mv_ddr_twin_die: change order 2021-02-26 10:22:29 +01:00
ddr_training_ip_db.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
dram_if.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
Makefile ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
mv_ddr_build_message.c ddr: marvell: a38x: bump version to 14.0.0 2021-02-26 10:22:29 +01:00
mv_ddr_common.c ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
mv_ddr_common.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_plat.c ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination 2022-01-14 07:47:57 +01:00
mv_ddr_plat.h ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
mv_ddr_regs.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_spd.c ddr: marvell: a38x: fix memory size calculation using 32bit bus width 2021-02-26 10:22:29 +01:00
mv_ddr_spd.h ddr: marvell: a38x: Add more space for additional info from SPD 2021-03-12 07:42:37 +01:00
mv_ddr_sys_env_lib.c ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
mv_ddr_sys_env_lib.h arm: mvebu: a38x: Remove dead code ARMADA_39X 2021-03-12 07:44:21 +01:00
mv_ddr_topology.c ddr: marvell: a38x: add support for twin-die combined memory device 2021-02-26 10:22:29 +01:00
mv_ddr_topology.h ddr: marvell: a38x: import header change from upstream 2021-02-26 10:22:29 +01:00
mv_ddr_training_db.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
seq_exec.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
xor.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
xor.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
xor_regs.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00