mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 12:45:42 +00:00
e37ac717d7
Converted to use fsl_esdhc_imx for i.MX platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
196 lines
4.9 KiB
C
196 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2011 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx25.h>
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#include <asm/arch/clock.h>
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#include <mmc.h>
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#include <fsl_esdhc_imx.h>
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#include <i2c.h>
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#include <power/pmic.h>
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#include <fsl_pmic.h>
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#include <mc34704.h>
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#define FEC_RESET_B IMX_GPIO_NR(4, 8)
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#define FEC_ENABLE_B IMX_GPIO_NR(2, 3)
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#define CARD_DETECT IMX_GPIO_NR(2, 1)
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_FSL_ESDHC_IMX
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struct fsl_esdhc_cfg esdhc_cfg[1] = {
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{IMX_MMC_SDHC1_BASE},
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};
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#endif
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define FEC_OUT_PAD_CTRL 0
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#define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
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PAD_CTL_ODE)
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static void mx25pdk_fec_init(void)
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{
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static const iomux_v3_cfg_t fec_pads[] = {
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MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
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MX25_PAD_FEC_RX_DV__FEC_RX_DV,
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MX25_PAD_FEC_RDATA0__FEC_RDATA0,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
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MX25_PAD_FEC_MDIO__FEC_MDIO,
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MX25_PAD_FEC_RDATA1__FEC_RDATA1,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_D12__GPIO_4_8, 0), /* FEC_RESET_B */
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NEW_PAD_CTRL(MX25_PAD_A17__GPIO_2_3, 0), /* FEC_ENABLE_B */
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};
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static const iomux_v3_cfg_t i2c_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_I2C1_CLK__I2C1_CLK, I2C_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_I2C1_DAT__I2C1_DAT, I2C_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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/* Assert RESET and ENABLE low */
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gpio_direction_output(FEC_RESET_B, 0);
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gpio_direction_output(FEC_ENABLE_B, 0);
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udelay(10);
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/* Deassert RESET and ENABLE */
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gpio_set_value(FEC_RESET_B, 1);
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gpio_set_value(FEC_ENABLE_B, 1);
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/* Setup I2C pins so that PMIC can turn on PHY supply */
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imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads));
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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/*
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* Set up input pins with hysteresis and 100-k pull-ups
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*/
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#define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define UART1_OUT_PAD_CTRL 0
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static void mx25pdk_uart1_init(void)
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{
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static const iomux_v3_cfg_t uart1_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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int board_early_init_f(void)
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{
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mx25pdk_uart1_init();
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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struct pmic *p;
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int ret;
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mx25pdk_fec_init();
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ret = pmic_init(I2C_0);
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if (ret)
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return ret;
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p = pmic_get("FSL_PMIC");
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if (!p)
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return -ENODEV;
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/* Turn on Ethernet PHY and LCD supplies */
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pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE | ONOFFA);
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return 0;
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}
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#ifdef CONFIG_FSL_ESDHC_IMX
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int board_mmc_getcd(struct mmc *mmc)
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{
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/* Set up the Card Detect pin. */
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imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_A15__GPIO_2_1, 0));
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gpio_direction_input(CARD_DETECT);
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return !gpio_get_value(CARD_DETECT);
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}
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int board_mmc_init(bd_t *bis)
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{
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static const iomux_v3_cfg_t sdhc1_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
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/*
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* Set the eSDHC1 PER clock to the maximum frequency lower than or equal
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* to 50 MHz that can be obtained, which requires to use UPLL as the
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* clock source. This actually gives 48 MHz.
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*/
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imx_set_perclk(MXC_ESDHC1_CLK, true, 50000000);
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
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return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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}
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#endif
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int checkboard(void)
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{
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puts("Board: MX25PDK\n");
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return 0;
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}
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/* Lowlevel init isn't used on mx25pdk, so just provide a dummy one here */
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void lowlevel_init(void) {}
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