mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 01:17:39 +00:00
c1710bfc4f
The device tree for rk3588 and rock-5b contain usb3 nodes that have deviated too much from current state of submitted mainline linux usb3 patches, see [1]. Sync usb3 related nodes from latest patches and collaboras rk3588 tree so that dwc3-generic driver can be updated to include support for the rockchip,rk3588-dwc3 compatible in the future, use rockchip,rk3568-dwc3 compatible until final node is merged in linux maintainer tree. [1] https://lore.kernel.org/lkml/20231009172129.43568-1-sebastian.reichel@collabora.com/ Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
189 lines
2.9 KiB
Text
189 lines
2.9 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Collabora Ltd.
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*/
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#include "rk3588-u-boot.dtsi"
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#include <dt-bindings/usb/pd.h>
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/ {
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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};
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vcc12v_dcin: vcc12v-dcin-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc12v_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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};
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&combphy2_psu {
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status = "okay";
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};
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&fspim2_pins {
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bootph-all;
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};
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&pinctrl {
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usb {
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usbc0_int: usbc0-int {
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rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdhci {
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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};
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&sfc {
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bootph-pre-ram;
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u-boot,spl-sfc-no-dma;
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pinctrl-names = "default";
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pinctrl-0 = <&fspim2_pins>;
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status = "okay";
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flash@0 {
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bootph-pre-ram;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&u2phy0 {
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status = "okay";
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};
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&u2phy0_otg {
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status = "okay";
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};
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&u2phy1 {
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status = "okay";
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};
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&u2phy1_otg {
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status = "okay";
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};
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&usbdp_phy1 {
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status = "okay";
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};
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&usbdp_phy1_u3 {
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status = "okay";
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};
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&usbdp_phy0 {
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orientation-switch;
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mode-switch;
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sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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usbdp_phy0_typec_ss: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&usbc0_ss>;
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};
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usbdp_phy0_typec_sbu: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&usbc0_sbu>;
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};
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};
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};
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&usbdp_phy0_u3 {
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status = "okay";
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};
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&usb_host0_xhci {
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usb-role-switch;
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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usb_host0_xhci_drd_sw: endpoint {
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remote-endpoint = <&usbc0_hs>;
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};
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};
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};
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&usb_host1_xhci {
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status = "okay";
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};
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&usb_host2_xhci {
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status = "okay";
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer>;
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status = "okay";
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usbc0: usb-typec@22 {
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compatible = "fcs,fusb302";
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reg = <0x22>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&usbc0_int>;
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vbus-supply = <&vcc12v_dcin>;
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status = "okay";
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usb_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "sink";
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try-power-role = "sink";
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op-sink-microwatt = <1000000>;
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sink-pdos =
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<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
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<PDO_VAR(5000, 20000, 5000)>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_hs: endpoint {
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remote-endpoint = <&usb_host0_xhci_drd_sw>;
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};
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};
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port@1 {
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reg = <1>;
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usbc0_ss: endpoint {
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remote-endpoint = <&usbdp_phy0_typec_ss>;
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};
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};
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port@2 {
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reg = <2>;
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usbc0_sbu: endpoint {
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remote-endpoint = <&usbdp_phy0_typec_sbu>;
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};
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};
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};
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};
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};
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};
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