u-boot/drivers/clk/mediatek
Fabien Parent 832685f07c clk: mediatek: use unsigned type for returning the clk rate
mtk_clk_find_parent_rate is calling clk_get_rate to know the rate
of a parent clock. clk_get_rate returns a ulong, while
mtk_clk_find_parent_rate returns an int. This implicit cast creates
an issue for clock rates big enough to need the full 32 bits to
store its data. When that happen the clk rate will become incorrect
because of the implicit cast between ulong -> int -> ulong.

This commit change the return type of mtk_clk_find_parent_rate to
ulong.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2020-01-26 12:03:06 +01:00
..
clk-mt7622.c clk: mediatek: add driver for MT7622 2020-01-16 09:39:45 -05:00
clk-mt7623.c clk: MediaTek: add hifsys entry for MT7623 SoC. 2019-08-07 15:31:03 -04:00
clk-mt7629.c clk: mediatek: mt7629: add support for ssusbsys 2020-01-16 09:39:45 -05:00
clk-mt8512.c clk: mediatek: add driver support for MT8512 2020-01-16 09:39:45 -05:00
clk-mt8516.c clk: mediatek: add driver for MT8516 2019-04-23 17:57:26 -04:00
clk-mt8518.c clk: mediatek: add driver for MT8518 2019-12-03 08:44:14 -05:00
clk-mtk.c clk: mediatek: use unsigned type for returning the clk rate 2020-01-26 12:03:06 +01:00
clk-mtk.h clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll 2020-01-16 09:39:45 -05:00
Makefile clk: mediatek: add driver for MT7622 2020-01-16 09:39:45 -05:00