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d3ee9dbd59
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave code including comment, folder and API name to ELE to align. Signed-off-by: Peng Fan <peng.fan@nxp.com>
320 lines
6 KiB
C
320 lines
6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020 NXP
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*/
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#include <common.h>
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#include <console.h>
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#include <errno.h>
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#include <fuse.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/imx-regs.h>
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#include <env.h>
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#include <asm/mach-imx/ele_api.h>
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#include <asm/global_data.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define FUSE_BANKS 64
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#define WORDS_PER_BANKS 8
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struct fsb_map_entry {
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s32 fuse_bank;
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u32 fuse_words;
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bool redundancy;
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};
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struct ele_map_entry {
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s32 fuse_bank;
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u32 fuse_words;
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u32 fuse_offset;
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u32 ele_index;
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};
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#if defined(CONFIG_IMX8ULP)
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#define FSB_OTP_SHADOW 0x800
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struct fsb_map_entry fsb_mapping_table[] = {
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{ 3, 8 },
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{ 4, 8 },
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{ -1, 48 }, /* Reserve 48 words */
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{ 5, 8 },
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{ 6, 8 },
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{ 8, 4, true },
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{ 24, 4, true },
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{ 26, 4, true },
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{ 27, 4, true },
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{ 28, 8 },
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{ 29, 8 },
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{ 30, 8 },
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{ 31, 8 },
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{ 37, 8 },
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{ 38, 8 },
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{ 39, 8 },
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{ 40, 8 },
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{ 41, 8 },
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{ 42, 8 },
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{ 43, 8 },
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{ 44, 8 },
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{ 45, 8 },
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{ 46, 8 },
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};
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/* None ECC banks such like Redundancy or Bit protect */
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u32 nonecc_fuse_banks[] = {
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0, 1, 8, 12, 16, 22, 24, 25, 26, 27, 36, 41, 51, 56
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};
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struct ele_map_entry ele_api_mapping_table[] = {
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{ 1, 8 }, /* LOCK */
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{ 2, 8 }, /* ECID */
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{ 7, 4, 0, 1 }, /* OTP_UNIQ_ID */
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{ 15, 8 }, /* OEM SRK HASH */
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{ 23, 1, 4, 2 }, /* OTFAD */
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{ 25, 8 }, /* Test config2 */
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{ 26, 8 }, /* PMU */
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{ 27, 8 }, /* Test flow/USB */
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{ 32, 8 }, /* GP1 */
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{ 33, 8 }, /* GP2 */
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{ 34, 8 }, /* GP3 */
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{ 35, 8 }, /* GP4 */
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{ 36, 8 }, /* GP5 */
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{ 49, 8 }, /* GP8 */
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{ 50, 8 }, /* GP9 */
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{ 51, 8 }, /* GP10 */
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};
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#elif defined(CONFIG_ARCH_IMX9)
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#define FSB_OTP_SHADOW 0x8000
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struct fsb_map_entry fsb_mapping_table[] = {
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{ 0, 8 },
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{ 1, 8 },
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{ 2, 8 },
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{ 3, 8 },
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{ 4, 8 },
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{ 5, 8 },
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{ 6, 4 },
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{ -1, 260 },
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{ 39, 8 },
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{ 40, 8 },
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{ 41, 8 },
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{ 42, 8 },
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{ 43, 8 },
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{ 44, 8 },
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{ 45, 8 },
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{ 46, 8 },
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{ 47, 8 },
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{ 48, 8 },
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{ 49, 8 },
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{ 50, 8 },
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{ 51, 8 },
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{ 52, 8 },
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{ 53, 8 },
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{ 54, 8 },
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{ 55, 8 },
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{ 56, 8 },
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{ 57, 8 },
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{ 58, 8 },
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{ 59, 8 },
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{ 60, 8 },
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{ 61, 8 },
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{ 62, 8 },
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{ 63, 8 },
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};
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struct ele_map_entry ele_api_mapping_table[] = {
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{ 7, 1, 7, 63 },
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{ 16, 8, },
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{ 17, 8, },
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{ 22, 1, 6 },
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{ 23, 1, 4 },
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};
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#endif
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static s32 map_fsb_fuse_index(u32 bank, u32 word, bool *redundancy)
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{
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s32 size = ARRAY_SIZE(fsb_mapping_table);
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s32 i, word_pos = 0;
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/* map the fuse from ocotp fuse map to FSB*/
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for (i = 0; i < size; i++) {
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if (fsb_mapping_table[i].fuse_bank != -1 &&
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fsb_mapping_table[i].fuse_bank == bank &&
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fsb_mapping_table[i].fuse_words > word) {
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break;
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}
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word_pos += fsb_mapping_table[i].fuse_words;
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}
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if (i == size)
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return -1; /* Failed to find */
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if (fsb_mapping_table[i].redundancy) {
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*redundancy = true;
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return (word >> 1) + word_pos;
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}
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*redundancy = false;
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return word + word_pos;
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}
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static s32 map_ele_fuse_index(u32 bank, u32 word)
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{
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s32 size = ARRAY_SIZE(ele_api_mapping_table);
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s32 i;
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/* map the fuse from ocotp fuse map to FSB*/
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for (i = 0; i < size; i++) {
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if (ele_api_mapping_table[i].fuse_bank != -1 &&
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ele_api_mapping_table[i].fuse_bank == bank) {
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if (word >= ele_api_mapping_table[i].fuse_offset &&
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word < (ele_api_mapping_table[i].fuse_offset +
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ele_api_mapping_table[i].fuse_words))
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break;
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}
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}
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if (i == size)
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return -1; /* Failed to find */
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if (ele_api_mapping_table[i].ele_index != 0)
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return ele_api_mapping_table[i].ele_index;
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return ele_api_mapping_table[i].fuse_bank * 8 + word;
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}
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#if defined(CONFIG_IMX8ULP)
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int fuse_sense(u32 bank, u32 word, u32 *val)
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{
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s32 word_index;
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bool redundancy;
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if (bank >= FUSE_BANKS || word >= WORDS_PER_BANKS || !val)
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return -EINVAL;
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word_index = map_fsb_fuse_index(bank, word, &redundancy);
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if (word_index >= 0) {
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*val = readl((ulong)FSB_BASE_ADDR + FSB_OTP_SHADOW + (word_index << 2));
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if (redundancy)
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*val = (*val >> ((word % 2) * 16)) & 0xFFFF;
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return 0;
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}
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word_index = map_ele_fuse_index(bank, word);
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if (word_index >= 0) {
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u32 data[4];
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u32 res, size = 4;
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int ret;
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/* Only UID return 4 words */
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if (word_index != 1)
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size = 1;
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ret = ele_read_common_fuse(word_index, data, size, &res);
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if (ret) {
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printf("ahab read fuse failed %d, 0x%x\n", ret, res);
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return ret;
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}
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if (word_index == 1) {
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*val = data[word]; /* UID */
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} else if (word_index == 2) {
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/*
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* OTFAD 3 bits as follow:
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* bit 0: OTFAD_ENABLE
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* bit 1: OTFAD_DISABLE_OVERRIDE
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* bit 2: KEY_BLOB_EN
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*/
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*val = data[0] << 3;
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} else {
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*val = data[0];
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}
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return 0;
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}
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return -ENOENT;
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}
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#elif defined(CONFIG_ARCH_IMX9)
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int fuse_sense(u32 bank, u32 word, u32 *val)
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{
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s32 word_index;
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bool redundancy;
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if (bank >= FUSE_BANKS || word >= WORDS_PER_BANKS || !val)
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return -EINVAL;
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word_index = map_fsb_fuse_index(bank, word, &redundancy);
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if (word_index >= 0) {
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*val = readl((ulong)FSB_BASE_ADDR + FSB_OTP_SHADOW + (word_index << 2));
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if (redundancy)
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*val = (*val >> ((word % 2) * 16)) & 0xFFFF;
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return 0;
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}
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word_index = map_ele_fuse_index(bank, word);
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if (word_index >= 0) {
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u32 data;
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u32 res, size = 1;
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int ret;
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ret = ele_read_common_fuse(word_index, &data, size, &res);
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if (ret) {
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printf("ahab read fuse failed %d, 0x%x\n", ret, res);
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return ret;
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}
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*val = data;
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return 0;
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}
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return -ENOENT;
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}
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#endif
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int fuse_read(u32 bank, u32 word, u32 *val)
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{
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return fuse_sense(bank, word, val);
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}
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int fuse_prog(u32 bank, u32 word, u32 val)
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{
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u32 res;
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int ret;
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bool lock = false;
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if (bank >= FUSE_BANKS || word >= WORDS_PER_BANKS || !val)
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return -EINVAL;
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/* Lock 8ULP ECC fuse word, so second programming will return failure.
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* iMX9 OTP can protect ECC fuse, so not need it
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*/
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#if defined(CONFIG_IMX8ULP)
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u32 i;
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for (i = 0; i < ARRAY_SIZE(nonecc_fuse_banks); i++) {
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if (nonecc_fuse_banks[i] == bank)
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break;
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}
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if (i == ARRAY_SIZE(nonecc_fuse_banks))
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lock = true;
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#endif
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ret = ele_write_fuse((bank * 8 + word), val, lock, &res);
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if (ret) {
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printf("ahab write fuse failed %d, 0x%x\n", ret, res);
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return ret;
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}
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return 0;
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}
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int fuse_override(u32 bank, u32 word, u32 val)
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{
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printf("Override fuse to i.MX8ULP in u-boot is forbidden\n");
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return -EPERM;
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}
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