u-boot/arch/riscv
Bin Meng ffdc71bc09 Revert "riscv: cpu: fu740: clear feature disable CSR"
This reverts commit bc8bbb77f7.

This commit breaks U-Boot booting on SiFive Unleashed board, as
there is no such CSR on U54 core.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-05-14 16:26:20 +08:00
..
cpu Revert "riscv: cpu: fu740: clear feature disable CSR" 2021-05-14 16:26:20 +08:00
dts riscv: Don't reserve AI ram in k210 dts 2021-05-14 16:20:50 +08:00
include/asm lmb: move CONFIG_LMB in Kconfig 2021-04-22 14:09:45 -04:00
lib Add support for stack-protector 2021-04-20 07:31:12 -04:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: assembler versions of memcpy, memmove, memset 2021-04-08 15:37:29 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00