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9d8f814beb
MEMCLKMGR_EXTCNTRST_C0CNTRST register defined as BIT[0] in documentation but it is wrongly defined as BIT[7] in u-boot code. This register is used to hold associated pingpong counter in reset while PLL and 5:1 mux configuration is changed. Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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.. | ||
clk-agilex.c | ||
clk-agilex.h | ||
clk-arria10.c | ||
clk-mem-n5x.c | ||
clk-mem-n5x.h | ||
clk-n5x.c | ||
clk-n5x.h | ||
Makefile |