mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
116 lines
3.8 KiB
C
116 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2012-2016 Toradex, Inc.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch-tegra/tegra_i2c.h>
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#include "as3722_init.h"
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/* AS3722-PMIC-specific early init code - get CPU rails up, etc */
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void tegra_i2c_ll_write_addr(uint addr, uint config)
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{
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struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
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writel(addr, ®->cmd_addr0);
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writel(config, ®->cnfg);
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}
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void tegra_i2c_ll_write_data(uint data, uint config)
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{
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struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
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writel(data, ®->cmd_data1);
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writel(config, ®->cnfg);
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}
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void pmic_enable_cpu_vdd(void)
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{
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debug("%s entry\n", __func__);
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#ifdef AS3722_SD1VOLTAGE_DATA
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/* Set up VDD_CORE, for boards where OTP is incorrect*/
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debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__);
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/* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */
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tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
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tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES);
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/*
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* Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
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* tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES);
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*/
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udelay(10 * 1000);
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#endif
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debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__);
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/*
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* Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.
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* First set VDD to 1.0V, then enable the VDD regulator.
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*/
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tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
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tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES);
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/*
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* Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
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* tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES);
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*/
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udelay(10 * 1000);
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debug("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__);
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/*
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* Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus.
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* First set VDD to 1.0V, then enable the VDD regulator.
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*/
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tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
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tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES);
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/*
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* Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
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* tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES);
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*/
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udelay(10 * 1000);
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debug("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__);
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/*
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* Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus.
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* First set VDD to 1.2V, then enable the VDD regulator.
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*/
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tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
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tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES);
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/*
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* Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
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* tegra_i2c_ll_write_data(AS3722_LDO2CONTROL_DATA, I2C_SEND_2_BYTES);
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*/
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udelay(10 * 1000);
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debug("%s: Set VDD_SDMMC1 to 3.3V via AS3722 reg 0x11/4E\n", __func__);
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/*
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* Bring up VDD_SDMMC1 via the AS3722 PMIC on the PWR I2C bus.
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* First set it to value closest to 3.3V, then enable the regulator
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*
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* NOTE: We do this early because doing it later seems to hose the CPU
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* power rail/partition startup. Need to debug.
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*/
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tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
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tegra_i2c_ll_write_data(AS3722_LDO1VOLTAGE_DATA, I2C_SEND_2_BYTES);
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/*
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* Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
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* tegra_i2c_ll_write_data(AS3722_LDO1CONTROL_DATA, I2C_SEND_2_BYTES);
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*/
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udelay(10 * 1000);
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debug("%s: Set VDD_SDMMC3 to 3.3V via AS3722 reg 0x16/4E\n", __func__);
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/*
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* Bring up VDD_SDMMC3 via the AS3722 PMIC on the PWR I2C bus.
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* First set it to bypass 3.3V straight thru, then enable the regulator
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*
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* NOTE: We do this early because doing it later seems to hose the CPU
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* power rail/partition startup. Need to debug.
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*/
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tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
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tegra_i2c_ll_write_data(AS3722_LDO6VOLTAGE_DATA, I2C_SEND_2_BYTES);
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/*
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* Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
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* tegra_i2c_ll_write_data(AS3722_LDO6CONTROL_DATA, I2C_SEND_2_BYTES);
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*/
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udelay(10 * 1000);
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}
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