u-boot/doc/I2C_Edge_Conditions
wdenk 3e38691e8f * Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)

* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs

* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS

* Patch by Denis Peter, 04 Apr 2003:
  - update MIP405-4 board

* Patches by Denis Peter, 03 April 2003:
  - fix PCI IRQs on MPL boards
  - fix two more un-relocated pointer problems

* Fix behaviour of "run" command:
  - print error message iv variable does not exist
  - terminate processing of arguments in case of error

* Patches by Peter Figuli, 10 Mar 2003
  - Add support for BTUART on PXA platform
  - Add support for WEP EP250 (PXA) board

* Fix flash problems on INCA-IP; add tool to allow bruning images  to
  flash using a BDI2000

* Implement fix for I2C Edge Conditions problem for all boards that
  use the bit-banging driver (common/soft_i2c.c)

* Add patches by Robert Schwebel, 31 Mar 2003:
  - csb226 board: bring in sync with innokom/memsetup.S
  - csb226 board: fix MDREFR handling
  - misc doc fixes / extensions
  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
  - add BOOT_PROGRESS to armlinux.c
2003-04-05 00:53:31 +00:00

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I2C Edge Conditions:
====================
I2C devices may be left in a write state if a read was occuring
and the CPU was reset. This may result in EEPROM data corruption.
The edge condition is as follows:
1) A read operation begins.
2) I2C controller issues a start command.
3) The I2C writes the device address.
4) The CPU is reset at this point.
Once the CPU reinitializes and the read is tried again:
1) The I2C controller issues a start command.
2) The I2C controller writes the device address.
3) The I2C controller writes the offset.
The EEPROM sees:
1) START
2) device address
3) START "this start is ignored by most EEPROMs"
4) device address "EEPROM interprets this as offset"
5) Offset in device, "EEPROM interprets this as data to write"
The device will interpret this sequence as a WRITE command and
write rubbish into itself, i.e. the "offset" will be interpreted
as data to be written in location "device address".
Notes
-----
!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A IBM 4xx BUG!!!
This reset edge condition could possibly be present in every I2C
controller and device available. For boards where a I2C bus reset
function can be implemented a i2c_init_board() function should be
provided and enabled by #define'ing CFG_I2C_INIT_BOARD in your
board's config file. Note that this is NOT necessary when using the
bit-banging I2C driver (common/soft_i2c.c) as this already includes
the I2C bus reset sequence.
Many thanks to Bill Hunter for finding this serious BUG.
email to: <williamhunter@attbi.com>
Erik Theisen <etheisen@mindspring.com>
Tue, 5 Mar 2002 23:02:19 -0500 (Wed 05:02 MET)