Simon Glass 5a30cee5d0 tegra: Correct logic for reading pll_misc in clock_start_pll() ... The logic for simple PLLs on T124 was broken by this commit: 722e000c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. Correct it by reading from the same pll_misc register that it writes to and adding an entry for the DP PLL in the pllinfo table. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>		2015-08-13 13:06:04 -07:00
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clock.c	tegra: Correct logic for reading pll_misc in clock_start_pll()	2015-08-13 13:06:04 -07:00
funcmux.c	ARM: Tegra210: Add SoC code/include files for T210	2015-07-28 10:30:19 -07:00
Kconfig	ARM: tegra: Add p2371-0000 board	2015-08-06 10:50:04 -07:00
Makefile	ARM: Tegra210: Add SoC code/include files for T210	2015-07-28 10:30:19 -07:00
pinmux.c	ARM: tegra: pinctrl: move Tegra210 code to the correct dir	2015-03-30 09:54:06 -07:00
xusb-padctl.c	ARM: Tegra210: Add SoC code/include files for T210	2015-07-28 10:30:19 -07:00