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d9e73a87a9
In preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* (C) Copyright 2008
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* Texas Instruments
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*
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Moahmmed Khasim <khasim@ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/tegra20.h>
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#include <asm/arch/timer.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* counter runs at 1MHz */
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#define TIMER_CLK 1000000
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#define TIMER_LOAD_VAL 0xffffffff
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/* timer without interrupts */
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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/* delay x useconds */
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void __udelay(unsigned long usec)
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{
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long tmo = usec * (TIMER_CLK / 1000) / 1000;
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unsigned long now, last = timer_get_us();
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while (tmo > 0) {
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now = timer_get_us();
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if (last > now) /* count up timer overflow */
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tmo -= TIMER_LOAD_VAL - last + now;
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else
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tmo -= now - last;
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last = now;
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}
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}
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ulong get_timer_masked(void)
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{
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ulong now;
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/* current tick value */
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now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ);
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if (now >= gd->lastinc) /* normal mode (non roll) */
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/* move stamp forward with absolute diff ticks */
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gd->tbl += (now - gd->lastinc);
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else /* we have rollover of incrementer */
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gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
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- gd->lastinc) + now;
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gd->lastinc = now;
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return gd->tbl;
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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unsigned long timer_get_us(void)
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{
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struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE;
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return readl(&timer_base->cntr_1us);
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}
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