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https://github.com/AsahiLinux/u-boot
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e0752bc184
Define routines of mmio write and read functionalities for zynqmp platform. Also do not call SMC from SPL because SPL is running before ATF in EL3 that's why SMCs can't be called because there is nothing to call. zynqmp_mmio*() are doing direct read/write accesses and this patch does the same. PMUFW is up and running at this time and there is a way to talk to pmufw via IPI but there is no reason to implement IPI stuff in SPL if we need just simple read for getting clock driver to work. Also make invoke_smc as global so that it can be reused in multile places where ever possible. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
26 lines
634 B
C
26 lines
634 B
C
/*
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* (C) Copyright 2014 - 2015 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_SYS_PROTO_H
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#define _ASM_ARCH_SYS_PROTO_H
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#define PAYLOAD_ARG_CNT 5
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int zynq_slcr_get_mio_pin_status(const char *periph);
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unsigned int zynqmp_get_silicon_version(void);
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void psu_init(void);
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void handoff_setup(void);
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int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
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int zynqmp_mmio_read(const u32 address, u32 *value);
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int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
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u32 *ret_payload);
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#endif /* _ASM_ARCH_SYS_PROTO_H */
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