mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
ac426b7290
The config is current broken. It compiles but does not boot because IDE is enabled. Remove all IDE options, and enable SCSI instead. Also add a working boot command and Linux bootargs, and enable command line editing to make it easier to work with. Signed-off-by: Simon Glass <sjg@chromium.org>
273 lines
7.7 KiB
C
273 lines
7.7 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2008
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* Graeme Russ, graeme.russ@gmail.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <asm/ibmpc.h>
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_SYS_COREBOOT
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#define CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_LAST_STAGE_INIT
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#define CONFIG_X86_NO_RESET_VECTOR
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#define CONFIG_SYS_VSNPRINTF
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#define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */
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#define CONFIG_ZBOOT_32
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#define CONFIG_PHYSMEM
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/*-----------------------------------------------------------------------
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* Watchdog Configuration
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*/
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#undef CONFIG_WATCHDOG
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#undef CONFIG_HW_WATCHDOG
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/* SATA AHCI storage */
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#define CONFIG_SCSI_AHCI
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#ifdef CONFIG_SCSI_AHCI
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_SATA_INTEL 1
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#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
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PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
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{PCI_VENDOR_ID_INTEL, \
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PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
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{PCI_VENDOR_ID_INTEL, \
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PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
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{PCI_VENDOR_ID_INTEL, \
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PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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#endif
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/* Generic TPM interfaced through LPC bus */
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#define CONFIG_GENERIC_LPC_TPM
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#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
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/*-----------------------------------------------------------------------
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* Real Time Clock Configuration
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*/
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#define CONFIG_RTC_MC146818
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#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
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#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS
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/*-----------------------------------------------------------------------
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* Serial Configuration
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*/
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK 1843200
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#define CONFIG_BAUDRATE 9600
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#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
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9600, 19200, 38400, 115200}
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#define CONFIG_SYS_NS16550_COM1 UART0_BASE
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#define CONFIG_SYS_NS16550_COM2 UART1_BASE
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#define CONFIG_SYS_NS16550_PORT_MAPPED
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
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"stdout=vga,eserial0,cbmem\0" \
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"stderr=vga,eserial0,cbmem\0"
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#define CONFIG_CONSOLE_MUX
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SYS_STDIO_DEREGISTER
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#define CONFIG_CBMEM_CONSOLE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_COMMAND_HISTORY
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#define CONFIG_AUTOCOMPLETE
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#define CONFIG_SUPPORT_VFAT
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/************************************************************
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* ATAPI support (experimental)
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************************************************************/
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#define CONFIG_ATAPI
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/************************************************************
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* DISK Partition support
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************************************************************/
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#define CONFIG_EFI_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_MAC_PARTITION
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#define CONFIG_ISO_PARTITION /* Experimental */
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#define CONFIG_CMD_PART
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#define CONFIG_CMD_CBFS
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_EXT4_WRITE
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#define CONFIG_PARTITION_UUIDS
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/*-----------------------------------------------------------------------
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* Video Configuration
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*/
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_COREBOOT
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#define CONFIG_VIDEO_SW_CURSOR
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#define VIDEO_FB_16BPP_WORD_SWAP
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#define CONFIG_I8042_KBD
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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/* x86 GPIOs are accessed through a PCI device */
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#define CONFIG_INTEL_ICH6_GPIO
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/*-----------------------------------------------------------------------
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_BDI
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#define CONFIG_CMD_BOOTD
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#define CONFIG_CMD_CONSOLE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_ECHO
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#undef CONFIG_CMD_FLASH
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#define CONFIG_CMD_FPGA
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_ITEST
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#define CONFIG_CMD_LOADB
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_MISC
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#define CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_SETGETDCR
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#define CONFIG_CMD_SOURCE
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#define CONFIG_CMD_XIMG
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#define CONFIG_CMD_SCSI
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_ZBOOT
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#define CONFIG_BOOTDELAY 2
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#define CONFIG_BOOTARGS \
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"root=/dev/sdb3 init=/sbin/init rootwait ro"
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#define CONFIG_BOOTCOMMAND \
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"ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200
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#define CONFIG_KGDB_SER_INDEX 2
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "boot > "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + \
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16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0x00100000
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#define CONFIG_SYS_MEMTEST_END 0x01000000
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#define CONFIG_SYS_LOAD_ADDR 0x100000
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_X86_ISR_TIMER
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/*-----------------------------------------------------------------------
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* SDRAM Configuration
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*/
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#define CONFIG_NR_DRAM_BANKS 4
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/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
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#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
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#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
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#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
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#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
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/*-----------------------------------------------------------------------
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* CPU Features
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*/
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#define CONFIG_SYS_GENERIC_TIMER
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#define CONFIG_SYS_PCAT_INTERRUPTS
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#define CONFIG_SYS_NUM_IRQS 16
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/*-----------------------------------------------------------------------
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* Memory organization:
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* 32kB Stack
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* 16kB Cache-As-RAM @ 0x19200000
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* 256kB Monitor
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* (128kB + Environment Sector Size) malloc pool
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*/
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#define CONFIG_SYS_STACK_SIZE (32 * 1024)
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#define CONFIG_SYS_CAR_ADDR 0x19200000
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#define CONFIG_SYS_CAR_SIZE (16 * 1024)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/*-----------------------------------------------------------------------
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* FLASH configuration
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*/
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#define CONFIG_SYS_NO_FLASH
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#undef CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_MAX_FLASH_SECT 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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/*-----------------------------------------------------------------------
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* Environment configuration
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*/
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_SIZE 0x01000
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/*-----------------------------------------------------------------------
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* PCI configuration
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*/
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#define CONFIG_PCI
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_STD_DEVICES_SETTINGS
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#endif /* __CONFIG_H */
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