Rick Chen e0465f80bd riscv: Introduce AVAILABLE_HARTS ... In SMP all harts will register themself in available_hart during start up. Then main hart will send IPI to other harts according to this variables. But this mechanism may not guarantee that all other harts can jump to next stage. When main hart is sending IPI to other hart according to available_harts, but other harts maybe still not finish the registration. Then the SMP booting will miss some harts finally. So let it become an option and it will be enabled by default. Please refer to the discussion: https://www.mail-archive.com/u-boot@lists.denx.de/msg449997.html Signed-off-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>		2022-09-26 14:29:13 +08:00
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ax25	riscv: ae350: enable Coherence Manager for ae350	2021-10-07 16:08:23 +08:00
fu540	board: sifive: use ccache driver instead of helper function	2021-09-07 10:34:29 +08:00
fu740	riscv: Enable SPI flash env for SiFive Unmatched.	2021-12-02 16:43:56 +08:00
generic	riscv: qemu: Switch to use binman to generate u-boot.itb	2021-05-19 17:01:51 +08:00
cpu.c	riscv: Introduce AVAILABLE_HARTS	2022-09-26 14:29:13 +08:00
Makefile	riscv: Move trap handler codes to mtrap.S	2018-12-18 09:56:27 +08:00
mtrap.S	riscv: Add option to print registers on exception	2020-02-10 14:51:08 +08:00
start.S	riscv: Introduce AVAILABLE_HARTS	2022-09-26 14:29:13 +08:00
u-boot-spl.lds	linker_lists: Rename sections to remove . prefix	2022-06-23 12:58:18 -04:00
u-boot.lds	linker_lists: Rename sections to remove . prefix	2022-06-23 12:58:18 -04:00