mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 11:18:28 +00:00
e0269579a5
done so far: * created zylonite board dir (based on lubbock) * extended some - but not all pxa sources and headers for Intel Monahans support (CONFIG_CPU_MONAHANS) * created Makefile zylonite target + MAKEALL entry * added some debug nonsense, remove later, grep for mk@tbd Status: compiles (eldk-4.0), and can be started with BDI, but runs forever and doesn't halt at breakpoints. Hmmm...
189 lines
5.4 KiB
C
189 lines
5.4 KiB
C
/*
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* linux/include/asm-arm/arch-pxa/hardware.h
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <linux/config.h>
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#include <asm/mach-types.h>
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/*
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* We requires absolute addresses.
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*/
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#define PCIO_BASE 0
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/*
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* Workarounds for at least 2 errata so far require this.
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* The mapping is set in mach-pxa/generic.c.
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*/
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#define UNCACHED_PHYS_0 0xff000000
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#define UNCACHED_ADDR UNCACHED_PHYS_0
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/*
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* Intel PXA2xx internal register mapping:
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*
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* 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
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* 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
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* 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
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* 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
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* 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
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* 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
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* 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
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*
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* Note that not all PXA2xx chips implement all those addresses, and the
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* kernel only maps the minimum needed range of this mapping.
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*/
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#ifndef CONFIG_CPU_MONAHANS
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#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
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#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
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#else
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/* There are too many IO area needed to map, so I divide them into 3 areas
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* 0x40000000 - 0x41ffffff <--> 0xf6000000 - 0xf7ffffff Devs
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*/
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#define io_p2v(x) ((((x) & 0xfc000000)>>4) + 0xf2000000 + ((x)&0x01ffffff))
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#define io_v2p(x) (((((x) - 0xf2000000)&0xfc000000)<<4) + ((x)&0x01ffffff))
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/*
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* 0x42000000 - 0x421fffff <--> 0xf8000000 - 0xf81fffff MMC2 & USIM2
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* 0x43000000 - 0x430fffff <--> 0xf8200000 - 0xf82fffff Caddo
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* 0x43100000 - 0x431fffff <--> 0xf8300000 - 0xf83fffff NAND
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* 0x44000000 - 0x440fffff <--> 0xf8400000 - 0xf84fffff LCD
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* 0x46000000 - 0x460fffff <--> 0xf8800000 - 0xf88fffff Mini LCD
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* 0x48100000 - 0x481fffff <--> 0xf8d00000 - 0xf8dfffff Dynamic Mem Ctl
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* 0x4a000000 - 0x4a0fffff <--> 0xf9000000 - 0xf90fffff Static Mem Ctl
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* 0x4c000000 - 0x4c0fffff <--> 0xf9400000 - 0xf94fffff USB Host
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*/
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#define io_p2v_2(x) (((((x) - 0x42000000) & 0xff000000) >> 3) + 0xf8000000\
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+ ((x) & 0x001fffff))
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#define io_v2p_2(x) (((((x) & 0xffe00000) - 0xf8000000) << 3) + 0x42000000\
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+ (x & 0x001fffff))
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/*
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* 0x50000000 - 0x500fffff <--> 0xfa000000 - 0xfa0fffff Camera Interface
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* 0x54000000 - 0x540fffff <--> 0xfa400000 - 0xfa4fffff 2D Graphics Ctrl
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* 0x54100000 - 0x541fffff <--> 0xfa500000 - 0xfa5fffff USB Device 2.0 Ctrl
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* 0x58000000 - 0x580fffff <--> 0xfa800000 - 0xfa8fffff Internal SRAM Ctrl
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*/
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#define io_p2v_3(x) ((((x) & 0xfc000000) >> 4) + 0xf5000000 + \
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((x) & 0x001fffff))
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#define io_v2p_3(x) (((((x) - 0xf5000000) & 0x0fc00000) << 4) + \
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((x) & 0x001fffff))
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#endif /* CONFIG_CPU_MONAHANS */
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#ifndef __ASSEMBLY__
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#if 0
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# define __REG(x) (*((volatile u32 *)io_p2v(x)))
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#else
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/*
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* This __REG() version gives the same results as the one above, except
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* that we are fooling gcc somehow so it generates far better and smaller
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* assembly code for access to contigous registers. It's a shame that gcc
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* doesn't guess this by itself.
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*/
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#include <asm/types.h>
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typedef struct { volatile u32 offset[4096]; } __regbase;
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# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
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# define __REG(x) __REGP(io_p2v(x))
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/* __REG_2 is for NAND, LCD etc.
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* __REG_3 is for Camera Interface, 2D Graphics, U2D etc.*/
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#ifdef CONFIG_CPU_MONAHANS
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#define __REG_2(x) __REGP(io_p2v_2(x))
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#define __REG_3(x) __REGP(io_p2v_3(x))
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#endif /* CONFIG_CPU_MONAHANS */
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#endif /* if 0 */
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/* With indexed regs we don't want to feed the index through io_p2v()
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especially if it is a variable, otherwise horrible code will result. */
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# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y)))
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# define __PREG(x) (io_v2p((u32)&(x)))
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#else /* ifndef __ASSEMBLY__ */
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# define __REG(x) io_p2v(x)
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# define __PREG(x) io_v2p(x)
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#ifdef CONFIG_CPU_MONAHANS
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# define __REG_2(x) io_p2v(x)
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# define __REG_3(x) io_p2v(x)
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#endif /* CONFIG_CPU_MONAHANS */
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#endif /* ifndef __ASSEMBLY__ */
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_MACH_ZYLONITE
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#include "zylonite.h"
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#endif
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/*
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* Handy routine to set GPIO alternate functions
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*/
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extern void pxa_gpio_mode( int gpio_mode );
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/*
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* Routine to enable or disable CKEN
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*/
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extern void pxa_set_cken(int clock, int enable);
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/*
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* return current memory and LCD clock frequency in units of 10kHz
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*/
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extern unsigned int get_memclk_frequency_10khz(void);
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extern unsigned int get_lcdclk_frequency_10khz(void);
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_ARCH_LUBBOCK
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#include "lubbock.h"
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#endif
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#ifdef CONFIG_ARCH_PXA_IDP
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#include "idp.h"
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#endif
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#ifdef CONFIG_ARCH_PXA_CERF
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#include "cerf.h"
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#endif
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#if CONFIG_CPU_MONAHANS_L2CACHE
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#define __cpuc_flush_l2cache_all xscale_flush_l2cache_all
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extern void __cpuc_flush_l2cache_all(void);
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#define flush_l2cache_all __cpuc_flush_l2cache_all
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#else
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#define __cpuc_flush_l2cache_all() do {} while (0)
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#define flush_l2cache_all() do {} while (0)
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#endif
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#ifdef CONFIG_ARCH_CSB226
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#include "csb226.h"
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#endif
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#ifdef CONFIG_ARCH_INNOKOM
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#include "innokom.h"
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#endif
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#ifdef CONFIG_ARCH_PLEB
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#include "pleb.h"
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#endif
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#ifdef CONFIG_MACH_MAINSTONE
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#include "mainstone.h"
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#endif
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#include "pxa-regs.h"
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#endif /* _ASM_ARCH_HARDWARE_H */
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