mirror of
https://github.com/AsahiLinux/u-boot
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2f9dd4bfc7
This tool fails with a pm_cfg_obj.c file generated by Vitis 2021.2. This is because that version of Vitis added the PM_CONFIG_OBJECT_TYPE_BASE that was not previously generated, thus the script does not implement it. Reported-by: Neal Frager <nealf@xilinx.com> [report: https://lists.buildroot.org/pipermail/buildroot/2022-February/636639.html] Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Link: https://lore.kernel.org/r/20220212125121.3398547-1-luca@lucaceresoli.net Signed-off-by: Michal Simek <michal.simek@xilinx.com>
303 lines
10 KiB
Python
Executable file
303 lines
10 KiB
Python
Executable file
#!/usr/bin/env python3
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# SPDX-License-Identifier: GPL-2.0+
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# Copyright (C) 2019 Luca Ceresoli <luca@lucaceresoli.net>
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import sys
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import re
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import struct
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import logging
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import argparse
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parser = argparse.ArgumentParser(
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description='Convert a PMU configuration object from C source to a binary blob.')
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parser.add_argument('-D', '--debug', action="store_true")
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parser.add_argument(
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"in_file", metavar='INPUT_FILE',
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help='PMU configuration object (C source as produced by Xilinx XSDK)')
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parser.add_argument(
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"out_file", metavar='OUTPUT_FILE',
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help='PMU configuration object binary blob')
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args = parser.parse_args()
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logging.basicConfig(format='%(levelname)s:%(message)s',
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level=(logging.DEBUG if args.debug else logging.WARNING))
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pm_define = {
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'PM_CAP_ACCESS' : 0x1,
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'PM_CAP_CONTEXT' : 0x2,
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'PM_CAP_WAKEUP' : 0x4,
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'NODE_UNKNOWN' : 0,
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'NODE_APU' : 1,
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'NODE_APU_0' : 2,
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'NODE_APU_1' : 3,
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'NODE_APU_2' : 4,
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'NODE_APU_3' : 5,
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'NODE_RPU' : 6,
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'NODE_RPU_0' : 7,
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'NODE_RPU_1' : 8,
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'NODE_PLD' : 9,
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'NODE_FPD' : 10,
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'NODE_OCM_BANK_0' : 11,
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'NODE_OCM_BANK_1' : 12,
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'NODE_OCM_BANK_2' : 13,
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'NODE_OCM_BANK_3' : 14,
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'NODE_TCM_0_A' : 15,
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'NODE_TCM_0_B' : 16,
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'NODE_TCM_1_A' : 17,
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'NODE_TCM_1_B' : 18,
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'NODE_L2' : 19,
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'NODE_GPU_PP_0' : 20,
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'NODE_GPU_PP_1' : 21,
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'NODE_USB_0' : 22,
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'NODE_USB_1' : 23,
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'NODE_TTC_0' : 24,
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'NODE_TTC_1' : 25,
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'NODE_TTC_2' : 26,
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'NODE_TTC_3' : 27,
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'NODE_SATA' : 28,
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'NODE_ETH_0' : 29,
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'NODE_ETH_1' : 30,
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'NODE_ETH_2' : 31,
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'NODE_ETH_3' : 32,
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'NODE_UART_0' : 33,
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'NODE_UART_1' : 34,
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'NODE_SPI_0' : 35,
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'NODE_SPI_1' : 36,
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'NODE_I2C_0' : 37,
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'NODE_I2C_1' : 38,
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'NODE_SD_0' : 39,
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'NODE_SD_1' : 40,
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'NODE_DP' : 41,
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'NODE_GDMA' : 42,
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'NODE_ADMA' : 43,
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'NODE_NAND' : 44,
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'NODE_QSPI' : 45,
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'NODE_GPIO' : 46,
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'NODE_CAN_0' : 47,
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'NODE_CAN_1' : 48,
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'NODE_EXTERN' : 49,
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'NODE_APLL' : 50,
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'NODE_VPLL' : 51,
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'NODE_DPLL' : 52,
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'NODE_RPLL' : 53,
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'NODE_IOPLL' : 54,
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'NODE_DDR' : 55,
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'NODE_IPI_APU' : 56,
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'NODE_IPI_RPU_0' : 57,
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'NODE_GPU' : 58,
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'NODE_PCIE' : 59,
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'NODE_PCAP' : 60,
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'NODE_RTC' : 61,
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'NODE_LPD' : 62,
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'NODE_VCU' : 63,
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'NODE_IPI_RPU_1' : 64,
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'NODE_IPI_PL_0' : 65,
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'NODE_IPI_PL_1' : 66,
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'NODE_IPI_PL_2' : 67,
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'NODE_IPI_PL_3' : 68,
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'NODE_PL' : 69,
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'NODE_ID_MA' : 70,
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'XILPM_RESET_PCIE_CFG' : 1000,
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'XILPM_RESET_PCIE_BRIDGE' : 1001,
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'XILPM_RESET_PCIE_CTRL' : 1002,
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'XILPM_RESET_DP' : 1003,
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'XILPM_RESET_SWDT_CRF' : 1004,
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'XILPM_RESET_AFI_FM5' : 1005,
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'XILPM_RESET_AFI_FM4' : 1006,
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'XILPM_RESET_AFI_FM3' : 1007,
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'XILPM_RESET_AFI_FM2' : 1008,
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'XILPM_RESET_AFI_FM1' : 1009,
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'XILPM_RESET_AFI_FM0' : 1010,
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'XILPM_RESET_GDMA' : 1011,
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'XILPM_RESET_GPU_PP1' : 1012,
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'XILPM_RESET_GPU_PP0' : 1013,
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'XILPM_RESET_GPU' : 1014,
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'XILPM_RESET_GT' : 1015,
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'XILPM_RESET_SATA' : 1016,
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'XILPM_RESET_ACPU3_PWRON' : 1017,
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'XILPM_RESET_ACPU2_PWRON' : 1018,
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'XILPM_RESET_ACPU1_PWRON' : 1019,
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'XILPM_RESET_ACPU0_PWRON' : 1020,
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'XILPM_RESET_APU_L2' : 1021,
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'XILPM_RESET_ACPU3' : 1022,
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'XILPM_RESET_ACPU2' : 1023,
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'XILPM_RESET_ACPU1' : 1024,
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'XILPM_RESET_ACPU0' : 1025,
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'XILPM_RESET_DDR' : 1026,
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'XILPM_RESET_APM_FPD' : 1027,
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'XILPM_RESET_SOFT' : 1028,
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'XILPM_RESET_GEM0' : 1029,
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'XILPM_RESET_GEM1' : 1030,
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'XILPM_RESET_GEM2' : 1031,
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'XILPM_RESET_GEM3' : 1032,
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'XILPM_RESET_QSPI' : 1033,
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'XILPM_RESET_UART0' : 1034,
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'XILPM_RESET_UART1' : 1035,
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'XILPM_RESET_SPI0' : 1036,
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'XILPM_RESET_SPI1' : 1037,
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'XILPM_RESET_SDIO0' : 1038,
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'XILPM_RESET_SDIO1' : 1039,
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'XILPM_RESET_CAN0' : 1040,
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'XILPM_RESET_CAN1' : 1041,
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'XILPM_RESET_I2C0' : 1042,
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'XILPM_RESET_I2C1' : 1043,
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'XILPM_RESET_TTC0' : 1044,
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'XILPM_RESET_TTC1' : 1045,
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'XILPM_RESET_TTC2' : 1046,
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'XILPM_RESET_TTC3' : 1047,
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'XILPM_RESET_SWDT_CRL' : 1048,
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'XILPM_RESET_NAND' : 1049,
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'XILPM_RESET_ADMA' : 1050,
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'XILPM_RESET_GPIO' : 1051,
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'XILPM_RESET_IOU_CC' : 1052,
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'XILPM_RESET_TIMESTAMP' : 1053,
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'XILPM_RESET_RPU_R50' : 1054,
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'XILPM_RESET_RPU_R51' : 1055,
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'XILPM_RESET_RPU_AMBA' : 1056,
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'XILPM_RESET_OCM' : 1057,
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'XILPM_RESET_RPU_PGE' : 1058,
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'XILPM_RESET_USB0_CORERESET' : 1059,
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'XILPM_RESET_USB1_CORERESET' : 1060,
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'XILPM_RESET_USB0_HIBERRESET' : 1061,
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'XILPM_RESET_USB1_HIBERRESET' : 1062,
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'XILPM_RESET_USB0_APB' : 1063,
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'XILPM_RESET_USB1_APB' : 1064,
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'XILPM_RESET_IPI' : 1065,
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'XILPM_RESET_APM_LPD' : 1066,
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'XILPM_RESET_RTC' : 1067,
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'XILPM_RESET_SYSMON' : 1068,
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'XILPM_RESET_AFI_FM6' : 1069,
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'XILPM_RESET_LPD_SWDT' : 1070,
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'XILPM_RESET_FPD' : 1071,
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'XILPM_RESET_RPU_DBG1' : 1072,
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'XILPM_RESET_RPU_DBG0' : 1073,
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'XILPM_RESET_DBG_LPD' : 1074,
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'XILPM_RESET_DBG_FPD' : 1075,
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'XILPM_RESET_APLL' : 1076,
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'XILPM_RESET_DPLL' : 1077,
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'XILPM_RESET_VPLL' : 1078,
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'XILPM_RESET_IOPLL' : 1079,
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'XILPM_RESET_RPLL' : 1080,
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'XILPM_RESET_GPO3_PL_0' : 1081,
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'XILPM_RESET_GPO3_PL_1' : 1082,
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'XILPM_RESET_GPO3_PL_2' : 1083,
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'XILPM_RESET_GPO3_PL_3' : 1084,
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'XILPM_RESET_GPO3_PL_4' : 1085,
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'XILPM_RESET_GPO3_PL_5' : 1086,
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'XILPM_RESET_GPO3_PL_6' : 1087,
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'XILPM_RESET_GPO3_PL_7' : 1088,
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'XILPM_RESET_GPO3_PL_8' : 1089,
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'XILPM_RESET_GPO3_PL_9' : 1090,
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'XILPM_RESET_GPO3_PL_10' : 1091,
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'XILPM_RESET_GPO3_PL_11' : 1092,
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'XILPM_RESET_GPO3_PL_12' : 1093,
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'XILPM_RESET_GPO3_PL_13' : 1094,
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'XILPM_RESET_GPO3_PL_14' : 1095,
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'XILPM_RESET_GPO3_PL_15' : 1096,
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'XILPM_RESET_GPO3_PL_16' : 1097,
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'XILPM_RESET_GPO3_PL_17' : 1098,
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'XILPM_RESET_GPO3_PL_18' : 1099,
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'XILPM_RESET_GPO3_PL_19' : 1100,
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'XILPM_RESET_GPO3_PL_20' : 1101,
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'XILPM_RESET_GPO3_PL_21' : 1102,
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'XILPM_RESET_GPO3_PL_22' : 1103,
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'XILPM_RESET_GPO3_PL_23' : 1104,
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'XILPM_RESET_GPO3_PL_24' : 1105,
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'XILPM_RESET_GPO3_PL_25' : 1106,
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'XILPM_RESET_GPO3_PL_26' : 1107,
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'XILPM_RESET_GPO3_PL_27' : 1108,
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'XILPM_RESET_GPO3_PL_28' : 1109,
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'XILPM_RESET_GPO3_PL_29' : 1110,
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'XILPM_RESET_GPO3_PL_30' : 1111,
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'XILPM_RESET_GPO3_PL_31' : 1112,
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'XILPM_RESET_RPU_LS' : 1113,
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'XILPM_RESET_PS_ONLY' : 1114,
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'XILPM_RESET_PL' : 1115,
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'XILPM_RESET_GPIO5_EMIO_92' : 1116,
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'XILPM_RESET_GPIO5_EMIO_93' : 1117,
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'XILPM_RESET_GPIO5_EMIO_94' : 1118,
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'XILPM_RESET_GPIO5_EMIO_95' : 1119,
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'PM_CONFIG_MASTER_SECTION_ID' : 0x101,
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'PM_CONFIG_SLAVE_SECTION_ID' : 0x102,
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'PM_CONFIG_PREALLOC_SECTION_ID' : 0x103,
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'PM_CONFIG_POWER_SECTION_ID' : 0x104,
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'PM_CONFIG_RESET_SECTION_ID' : 0x105,
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'PM_CONFIG_SHUTDOWN_SECTION_ID' : 0x106,
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'PM_CONFIG_SET_CONFIG_SECTION_ID' : 0x107,
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'PM_CONFIG_GPO_SECTION_ID' : 0x108,
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'PM_SLAVE_FLAG_IS_SHAREABLE' : 0x1,
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'PM_MASTER_USING_SLAVE_MASK' : 0x2,
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'PM_CONFIG_GPO1_MIO_PIN_34_MAP' : (1 << 10),
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'PM_CONFIG_GPO1_MIO_PIN_35_MAP' : (1 << 11),
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'PM_CONFIG_GPO1_MIO_PIN_36_MAP' : (1 << 12),
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'PM_CONFIG_GPO1_MIO_PIN_37_MAP' : (1 << 13),
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'PM_CONFIG_GPO1_BIT_2_MASK' : (1 << 2),
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'PM_CONFIG_GPO1_BIT_3_MASK' : (1 << 3),
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'PM_CONFIG_GPO1_BIT_4_MASK' : (1 << 4),
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'PM_CONFIG_GPO1_BIT_5_MASK' : (1 << 5),
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'SUSPEND_TIMEOUT' : 0xFFFFFFFF,
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'PM_CONFIG_OBJECT_TYPE_BASE' : 0x1,
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'PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK' : 0x00000001,
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'PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK' : 0x00000100,
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'PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK' : 0x00000200,
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}
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in_file = open(args.in_file, mode='r')
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out_file = open(args.out_file, mode='wb')
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num_re = re.compile(r"^([0-9]+)U?$")
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const_re = re.compile(r"^([A-Z_][A-Z0-9_]*)$")
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def process_item(item):
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logging.debug("* ITEM " + item)
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value = 0
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for item in item.split('|'):
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item = item.strip()
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num_match = num_re .match(item)
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const_match = const_re.match(item)
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if num_match:
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num = int(num_match.group(1))
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logging.debug(" - num " + str(num))
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value |= num
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elif const_match:
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name = const_match.group(1)
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if not name in pm_define:
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sys.stderr.write("Unknown define " + name + "!\n")
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exit(1)
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num = pm_define[name]
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logging.debug(" - def " + hex(num))
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value |= num
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logging.debug(" = res " + hex(value))
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out_file.write(struct.pack('<L', value))
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# Read all code
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code = in_file.read()
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# remove comments
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code = re.sub('//.*?\n|/\*.*?\*/', '', code, flags=re.DOTALL)
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# remove everything outside the XPm_ConfigObject array definition
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code = re.search('const u32 XPm_ConfigObject.*=.*{\n(.*)};',
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code, flags=re.DOTALL).group(1)
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# Process each comma-separated array item
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for item in code.split(','):
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item = item.strip()
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if item:
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process_item(item)
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print("Wrote %d bytes" % out_file.tell())
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