mirror of
https://github.com/AsahiLinux/u-boot
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136 lines
3.5 KiB
C
136 lines
3.5 KiB
C
/*
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* linkstation.c
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*
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* Misc LinkStation specific functions
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*
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* Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <version.h>
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#include <common.h>
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#include <mpc824x.h>
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#include <asm/io.h>
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#include <ns16550.h>
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#include <netdev.h>
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#ifdef CONFIG_PCI
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#include <pci.h>
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#endif
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extern void init_AVR_DUART(void);
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int checkboard (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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char *p;
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bd_t *bd = gd->bd;
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init_AVR_DUART();
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if ((p = getenv ("console_nr")) != NULL) {
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unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3;
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bd->bi_baudrate &= ~3;
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bd->bi_baudrate |= con_nr & 3;
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}
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return 0;
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}
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phys_size_t initdram (int board_type)
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{
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return (get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE));
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}
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/*
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* Initialize PCI Devices
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*/
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#ifdef CONFIG_PCI
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#ifndef CONFIG_PCI_PNP
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static struct pci_config_table pci_linkstation_config_table[] = {
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/* vendor, device, class */
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/* bus, dev, func */
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_ANY_ID, 0x0b, 0, /* AN983B or RTL8110S */
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/* ethernet controller */
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pci_cfgfunc_config_device, { PCI_ETH_IOADDR,
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PCI_ETH_MEMADDR,
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PCI_COMMAND_IO |
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_ANY_ID, 0x0c, 0, /* SII680 or IT8211AF */
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/* ide controller */
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pci_cfgfunc_config_device, { PCI_IDE_IOADDR,
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PCI_IDE_MEMADDR,
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PCI_COMMAND_IO |
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_ANY_ID, 0x0e, 0, /* D720101 USB controller, 1st USB 1.1 */
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pci_cfgfunc_config_device, { PCI_USB0_IOADDR,
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PCI_USB0_MEMADDR,
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_ANY_ID, 0x0e, 1, /* D720101 USB controller, 2nd USB 1.1 */
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pci_cfgfunc_config_device, { PCI_USB1_IOADDR,
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PCI_USB1_MEMADDR,
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_ANY_ID, 0x0e, 2, /* D720101 USB controller, USB 2.0 */
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pci_cfgfunc_config_device, { PCI_USB2_IOADDR,
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PCI_USB2_MEMADDR,
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ }
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};
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#endif
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struct pci_controller hose = {
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#ifndef CONFIG_PCI_PNP
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config_table:pci_linkstation_config_table,
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#endif
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};
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void pci_init_board (void)
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{
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pci_mpc824x_init (&hose);
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/* Reset USB 1.1 */
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/* Haven't seen any change without these on a HG, maybe it is
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* needed on other models */
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out_le32((volatile unsigned*)(PCI_USB0_MEMADDR + 8), 1);
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out_le32((volatile unsigned*)(PCI_USB1_MEMADDR + 8), 1);
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}
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#endif /* CONFIG_PCI */
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#define UART_DCR 0x80004511
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int board_early_init_f (void)
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{
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/* set DUART mode */
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out_8((volatile u8*)UART_DCR, 1);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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