Sagar Shrikant Kadam eb75ee4bd6 riscv: dts: hifive-unleashed-a00: add cpu aliases ... Add cpu aliases to U-Boot specific dtsi for hifive-unleashed. Without aliases we see that the CPU device sequence numbers are set randomly and the cpu list/detail command will show it as follows: => cpu list 1: cpu@1 rv64imafdc 2: cpu@2 rv64imafdc 3: cpu@3 rv64imafdc 0: cpu@4 rv64imafdc Seems like CPU probing with dm-model also relies on aliases as observed in case spi. The fu540-c000-u-boot.dtsi has cpu nodes and so adding corresponding aliases we can ensure that cpu devices are assigned proper sequence as follows: => cpu list 1: cpu@1 rv64imafdc 2: cpu@2 rv64imafdc 3: cpu@3 rv64imafdc 4: cpu@4 rv64imafdc Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>		2020-07-01 15:01:27 +08:00
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cpu	riscv: Add option to support RISC-V privileged spec 1.9	2020-07-01 15:01:22 +08:00
dts	riscv: dts: hifive-unleashed-a00: add cpu aliases	2020-07-01 15:01:27 +08:00
include/asm	riscv: Add option to support RISC-V privileged spec 1.9	2020-07-01 15:01:22 +08:00
lib	riscv: Allow use of reset drivers	2020-07-01 15:01:22 +08:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	riscv: Add Sipeed Maix support	2020-07-01 15:01:22 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00