mirror of
https://github.com/AsahiLinux/u-boot
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fa97ca161b
This reverts commit 0d67fac29f.
As real hardware testing (*) shows the above mentioned commit
breaks U-Boot on it. Revert for the upcoming release. We may get
more information in the future and optimize the code accordingly.
(*) on Intel Edison board.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
313 lines
7.6 KiB
ArmAsm
313 lines
7.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* U-Boot - x86 Startup Code
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*
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* This is always the first code to run from the U-Boot source. To spell it out:
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*
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* 1. When TPL (Tertiary Program Loader) is enabled, the boot flow is
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* TPL->SPL->U-Boot and this file is used for TPL. Then start_from_tpl.S is used
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* for SPL and start_from_spl.S is used for U-Boot proper.
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*
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* 2. When SPL (Secondary Program Loader) is enabled, but not TPL, the boot
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* flow is SPL->U-Boot and this file is used for SPL. Then start_from_spl.S is
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* used for U-Boot proper.
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*
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* 3. When neither TPL nor SPL is used, this file is used for U-Boot proper.
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*
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*/
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#include <config.h>
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#include <asm/global_data.h>
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#include <asm/post.h>
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#include <asm/processor.h>
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#include <asm/processor-flags.h>
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#include <generated/generic-asm-offsets.h>
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#include <generated/asm-offsets.h>
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#include <linux/linkage.h>
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.section .text.start
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.code32
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.globl _start
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.type _start, @function
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.globl _x86boot_start
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_x86boot_start:
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/*
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* This is the fail-safe 32-bit bootstrap entry point.
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*
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* This code is used when booting from another boot loader like
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* coreboot or EFI. So we repeat some of the same init found in
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* start16.
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*/
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cli
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cld
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/* Turn off cache (this might require a 486-class CPU) */
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movl %cr0, %eax
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orl $(X86_CR0_NW | X86_CR0_CD), %eax
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movl %eax, %cr0
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wbinvd
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/*
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* Zero the BIST (Built-In Self Test) value since we don't have it.
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* It must be 0 or the previous loader would have reported an error.
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*/
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movl $0, %ebp
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jmp 1f
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/* Add a way for tools to discover the _start entry point */
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.align 4
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.long 0x12345678
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_start:
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/* This is the 32-bit cold-reset entry point, coming from start16 */
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/* Save BIST */
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movl %eax, %ebp
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1:
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/* Save table pointer */
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movl %ecx, %esi
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#ifdef CONFIG_X86_LOAD_FROM_32_BIT
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lgdt gdt_ptr2
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#endif
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/* Load the segement registers to match the GDT loaded in start16.S */
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movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
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movw %ax, %fs
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movw %ax, %ds
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movw %ax, %gs
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movw %ax, %es
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movw %ax, %ss
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/* Clear the interrupt vectors */
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lidt blank_idt_ptr
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/*
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* Critical early platform init - generally not used, we prefer init
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* to happen later when we have a console, in case something goes
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* wrong.
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*/
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jmp early_board_init
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.globl early_board_init_ret
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early_board_init_ret:
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post_code(POST_START)
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/* Initialise Cache-As-RAM */
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jmp car_init
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.globl car_init_ret
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car_init_ret:
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#ifdef CONFIG_USE_CAR
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/*
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* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
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* or fully initialised SDRAM - we really don't care which)
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* starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
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* and early malloc() area. The MRC requires some space at the top.
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*
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* Stack grows down from top of CAR. We have:
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*
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* top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
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* MRC area
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* global_data with x86 global descriptor table
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* early malloc area
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* stack
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* bottom-> CONFIG_SYS_CAR_ADDR
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*/
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movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
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#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
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subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
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#endif
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#else
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/*
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* U-Boot enters here twice. For the first time it comes from
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* car_init_done() with esp points to a temporary stack and esi
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* set to zero. For the second time it comes from fsp_init_done()
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* with esi holding the HOB list address returned by the FSP.
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*/
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#endif
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/* Set up global data */
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mov %esp, %eax
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call board_init_f_alloc_reserve
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mov %eax, %esp
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call board_init_f_init_reserve
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#ifdef CONFIG_DEBUG_UART
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call debug_uart_init
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#endif
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/* Get address of global_data */
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mov %fs:0, %edx
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#if defined(CONFIG_USE_HOB) && !defined(CONFIG_USE_CAR)
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/* Store the HOB list if we have one */
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test %esi, %esi
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jz skip_hob
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movl %esi, GD_HOB_LIST(%edx)
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#ifdef CONFIG_HAVE_FSP
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/*
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* After fsp_init() returns, the stack has already been switched to a
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* place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
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* Enlarge the size of malloc() pool before relocation since we have
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* plenty of memory now.
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*/
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subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
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movl %esp, GD_MALLOC_BASE(%edx)
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#endif
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skip_hob:
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#else
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/* Store table pointer */
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movl %esi, GD_TABLE(%edx)
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#endif
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/* Store BIST */
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movl %ebp, GD_BIST(%edx)
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/* Set parameter to board_init_f() to boot flags */
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post_code(POST_START_DONE)
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xorl %eax, %eax
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/* Enter, U-Boot! */
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call board_init_f
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/* indicate (lack of) progress */
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movw $0x85, %ax
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jmp die
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.globl board_init_f_r_trampoline
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.type board_init_f_r_trampoline, @function
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board_init_f_r_trampoline:
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/*
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* SDRAM has been initialised, U-Boot code has been copied into
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* RAM, BSS has been cleared and relocation adjustments have been
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* made. It is now time to jump into the in-RAM copy of U-Boot
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*
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* %eax = Address of top of new stack
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*/
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/* Stack grows down from top of SDRAM */
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movl %eax, %esp
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/* See if we need to disable CAR */
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call car_uninit
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/* Re-enter U-Boot by calling board_init_f_r() */
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call board_init_f_r
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#ifdef CONFIG_TPL
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.globl jump_to_spl
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.type jump_to_spl, @function
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jump_to_spl:
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/* Reset stack to the top of CAR space */
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movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
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#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
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subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
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#endif
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jmp *%eax
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#endif
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die:
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hlt
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jmp die
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hlt
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WEAK(car_uninit)
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ret
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ENDPROC(car_uninit)
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blank_idt_ptr:
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.word 0 /* limit */
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.long 0 /* base */
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.p2align 2 /* force 4-byte alignment */
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/* Add a multiboot header so U-Boot can be loaded by GRUB2 */
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multiboot_header:
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/* magic */
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.long 0x1badb002
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/* flags */
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.long (1 << 16)
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/* checksum */
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.long -0x1BADB002 - (1 << 16)
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/* header addr */
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.long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
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/* load addr */
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.long CONFIG_SYS_TEXT_BASE
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/* load end addr */
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.long 0
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/* bss end addr */
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.long 0
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/* entry addr */
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.long CONFIG_SYS_TEXT_BASE
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#ifdef CONFIG_X86_LOAD_FROM_32_BIT
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/*
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* The following Global Descriptor Table is just enough to get us into
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* 'Flat Protected Mode' - It will be discarded as soon as the final
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* GDT is setup in a safe location in RAM
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*/
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gdt_ptr2:
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.word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
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.long gdt_rom2 /* base */
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/* Some CPUs are picky about GDT alignment... */
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.align 16
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.globl gdt_rom2
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gdt_rom2:
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/*
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* The GDT table ...
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*
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* Selector Type
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* 0x00 NULL
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* 0x08 Unused
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* 0x10 32bit code
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* 0x18 32bit data/stack
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*/
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/* The NULL Desciptor - Mandatory */
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.word 0x0000 /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x00 /* access */
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.byte 0x00 /* flags + limit_high */
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.byte 0x00 /* base_high */
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/* Unused Desciptor - (matches Linux) */
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.word 0x0000 /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x00 /* access */
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.byte 0x00 /* flags + limit_high */
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.byte 0x00 /* base_high */
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/*
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* The Code Segment Descriptor:
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* - Base = 0x00000000
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* - Size = 4GB
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* - Access = Present, Ring 0, Exec (Code), Readable
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* - Flags = 4kB Granularity, 32-bit
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*/
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.word 0xffff /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x9b /* access */
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.byte 0xcf /* flags + limit_high */
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.byte 0x00 /* base_high */
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/*
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* The Data Segment Descriptor:
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* - Base = 0x00000000
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* - Size = 4GB
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* - Access = Present, Ring 0, Non-Exec (Data), Writable
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* - Flags = 4kB Granularity, 32-bit
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*/
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.word 0xffff /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x93 /* access */
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.byte 0xcf /* flags + limit_high */
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.byte 0x00 /* base_high */
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#endif
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