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8c59f2023c
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode. To be able to use SPL, boards have to provide a supported SPL boot device. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
31 lines
543 B
C
31 lines
543 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Based on arch/mips/include/asm/spl.h.
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*
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* (C) Copyright 2012
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* Texas Instruments, <www.ti.com>
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*/
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#ifndef _ASM_RISCV_SPL_H_
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#define _ASM_RISCV_SPL_H_
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enum {
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BOOT_DEVICE_RAM,
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BOOT_DEVICE_MMC1,
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BOOT_DEVICE_MMC2,
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BOOT_DEVICE_MMC2_2,
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BOOT_DEVICE_NAND,
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BOOT_DEVICE_ONENAND,
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BOOT_DEVICE_NOR,
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BOOT_DEVICE_UART,
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BOOT_DEVICE_SPI,
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BOOT_DEVICE_USB,
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BOOT_DEVICE_SATA,
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BOOT_DEVICE_I2C,
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BOOT_DEVICE_BOARD,
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BOOT_DEVICE_DFU,
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BOOT_DEVICE_XIP,
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BOOT_DEVICE_BOOTROM,
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BOOT_DEVICE_NONE
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};
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#endif
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