mirror of
https://github.com/AsahiLinux/u-boot
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7031224000
Move bootph-all prop to common SoC dt file, because they are typically used by multiple boards. Unreferenced nodes are removed from the SPL device tree during a normal build. Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
353 lines
6.3 KiB
Text
353 lines
6.3 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Collabora Ltd.
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*/
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#include "rk3588-u-boot.dtsi"
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/usb/pd.h>
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/ {
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aliases {
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mmc1 = &sdmmc;
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};
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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};
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vcc12v_dcin: vcc12v-dcin-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc12v_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc5v0_usbdcin: vcc5v0-usbdcin {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usbdcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc5v0_usb: vcc5v0-usb {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_usbdcin>;
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};
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vbus5v0_typec: vbus5v0-typec {
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compatible = "regulator-fixed";
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regulator-name = "vbus5v0_typec";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_usb>;
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pinctrl-names = "default";
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pinctrl-0 = <&typec5v_pwren>;
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&fspim2_pins {
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bootph-all;
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};
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&pcie2x1l2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2x1l2_pins &pcie_reset_h>;
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reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pinctrl {
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pcie {
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pcie_reset_h: pcie-reset-h {
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rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie2x1l2_pins: pcie2x1l2-pins {
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rockchip,pins = <3 RK_PC7 4 &pcfg_pull_none>,
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<3 RK_PD0 4 &pcfg_pull_none>;
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};
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};
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usb {
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vcc5v0_host_en: vcc5v0-host-en {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb-typec {
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usbc0_int: usbc0-int {
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rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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typec5v_pwren: typec5v-pwren {
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rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdmmc {
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bus-width = <4>;
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status = "okay";
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};
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&sdhci {
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_data_strobe &emmc_rstnout>;
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};
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&sfc {
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bootph-pre-ram;
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u-boot,spl-sfc-no-dma;
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pinctrl-names = "default";
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pinctrl-0 = <&fspim2_pins>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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flash@0 {
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bootph-pre-ram;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&usb_host0_ehci {
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companion = <&usb_host0_ohci>;
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phys = <&u2phy2_host>;
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phy-names = "usb2-phy";
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status = "okay";
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};
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&usb_host0_ohci {
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phys = <&u2phy2_host>;
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phy-names = "usb2-phy";
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status = "okay";
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};
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&usb2phy2_grf {
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status = "okay";
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};
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&u2phy0 {
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status = "okay";
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};
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&u2phy0_otg {
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rockchip,typec-vbus-det;
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status = "okay";
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};
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&u2phy2 {
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resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>;
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reset-names = "phy", "apb";
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clock-output-names = "usb480m_phy2";
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status = "okay";
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};
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&u2phy2_host {
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phy-supply = <&vcc5v0_host>;
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status = "okay";
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};
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&usb_host1_ehci {
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companion = <&usb_host1_ohci>;
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phys = <&u2phy3_host>;
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phy-names = "usb2-phy";
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status = "okay";
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};
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&usb_host1_ohci {
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phys = <&u2phy3_host>;
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phy-names = "usb2-phy";
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status = "okay";
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};
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&usb2phy3_grf {
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status = "okay";
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};
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&u2phy3 {
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resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>;
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reset-names = "phy", "apb";
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clock-output-names = "usb480m_phy3";
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status = "okay";
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};
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&u2phy3_host {
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phy-supply = <&vcc5v0_host>;
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status = "okay";
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};
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&usbdp_phy0 {
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orientation-switch;
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svid = <0xff01>;
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sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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usbdp_phy0_orientation_switch: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&usbc0_orien_sw>;
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};
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usbdp_phy0_dp_altmode_mux: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dp_altmode_mux>;
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};
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};
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};
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&usbdp_phy0_u3 {
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status = "okay";
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};
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&usbdrd3_0 {
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status = "okay";
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};
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&usbdrd_dwc3_0 {
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dr_mode = "otg";
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usb-role-switch;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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dwc3_0_role_switch: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&usbc0_role_sw>;
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};
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};
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};
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&usbdp_phy1 {
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rockchip,dp-lane-mux = <2 3>;
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status = "okay";
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};
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&usbdp_phy1_u3 {
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status = "okay";
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};
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&usbdrd3_1 {
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status = "okay";
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};
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&u2phy1 {
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status = "okay";
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};
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&u2phy1_otg {
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status = "okay";
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};
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&i2c4 {
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pinctrl-0 = <&i2c4m1_xfer>;
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status = "okay";
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usbc0: fusb302@22 {
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compatible = "fcs,fusb302";
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reg = <0x22>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&usbc0_int>;
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vbus-supply = <&vbus5v0_typec>;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_role_sw: endpoint@0 {
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remote-endpoint = <&dwc3_0_role_switch>;
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};
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};
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};
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usb_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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try-power-role = "sink";
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op-sink-microwatt = <1000000>;
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sink-pdos =
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<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
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source-pdos =
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<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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altmodes {
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#address-cells = <1>;
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#size-cells = <0>;
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altmode@0 {
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reg = <0>;
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svid = <0xff01>;
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vdo = <0xffffffff>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_orien_sw: endpoint {
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remote-endpoint = <&usbdp_phy0_orientation_switch>;
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};
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};
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port@1 {
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reg = <1>;
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dp_altmode_mux: endpoint {
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remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
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};
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};
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};
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};
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};
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};
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