mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
10f6e4dc3a
This converts the following to Kconfig: CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_SPL_MALLOC_START We introduce a default value here as well, and CONFIG_SYS_SPL_MALLOC to control if we have a malloc pool or not. Signed-off-by: Tom Rini <trini@konsulko.com>
65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* (C) Copyright 2010
|
|
* Ilko Iliev <iliev@ronetix.at>
|
|
* Asen Dimov <dimov@ronetix.at>
|
|
* Ronetix GmbH <www.ronetix.at>
|
|
*
|
|
* (C) Copyright 2007-2008
|
|
* Stelian Pop <stelian@popies.net>
|
|
* Lead Tech Design <www.leadtechdesign.com>
|
|
*
|
|
* Configuation settings for the PM9G45 board.
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
/* ARM asynchronous clock */
|
|
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
|
|
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
|
|
|
|
/* SDRAM */
|
|
#define CONFIG_SYS_SDRAM_BASE 0x70000000
|
|
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
|
|
|
|
/* NAND flash */
|
|
#ifdef CONFIG_CMD_NAND
|
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
|
#define CONFIG_SYS_NAND_DBW_8
|
|
/* our ALE is AD21 */
|
|
#define CONFIG_SYS_NAND_MASK_ALE BIT(21)
|
|
/* our CLE is AD22 */
|
|
#define CONFIG_SYS_NAND_MASK_CLE BIT(22)
|
|
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
|
|
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3
|
|
#endif
|
|
|
|
#ifdef CONFIG_NAND_BOOT
|
|
/* bootstrap + u-boot + env in nandflash */
|
|
#elif CONFIG_SD_BOOT
|
|
/* bootstrap + u-boot + env + linux in mmc */
|
|
#endif
|
|
|
|
/* Defines for SPL */
|
|
|
|
#define CONFIG_SYS_MONITOR_LEN 0x80000
|
|
|
|
#ifdef CONFIG_SD_BOOT
|
|
#elif CONFIG_NAND_BOOT
|
|
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
|
|
|
|
#define CONFIG_SYS_NAND_ECCSIZE 256
|
|
#define CONFIG_SYS_NAND_ECCBYTES 3
|
|
#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
|
|
48, 49, 50, 51, 52, 53, 54, 55, \
|
|
56, 57, 58, 59, 60, 61, 62, 63, }
|
|
#endif
|
|
|
|
#define CONFIG_SYS_MASTER_CLOCK 132096000
|
|
#define CONFIG_SYS_AT91_PLLA 0x20c73f03
|
|
#define CONFIG_SYS_MCKR 0x1301
|
|
#define CONFIG_SYS_MCKR_CSS 0x1302
|
|
|
|
#endif
|