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dd2c633b2a
LPDDR4 initialization start with at board selected frequency and then it switches into 400MHz and 800MHz simultaneously to make the proper sequence work on each channel with associated training. So, add LPDDR4-800 timings inc file in driver area so-that these timings will take during LPDDR4 initialization phase. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com> |
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| .. | ||
| mediatek | ||
| rockchip | ||
| stm32mp1 | ||
| bmips_ram.c | ||
| k3-am654-ddrss.c | ||
| k3-am654-ddrss.h | ||
| Kconfig | ||
| Makefile | ||
| mpc83xx_sdram.c | ||
| ram-uclass.c | ||
| sandbox_ram.c | ||
| stm32_sdram.c | ||