u-boot/arch/mips/cpu
Daniel Schwierzeck 57bfb1aed6 mips: add config options for generic cache setup code
Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
..
cm_init.S SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
cpu.c command: Remove the cmd_tbl_t typedef 2020-05-18 18:36:55 -04:00
interrupts.c common: Move interrupt functions into a new header 2019-12-02 18:25:00 -05:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
start.S mips: add config options for generic cache setup code 2020-07-18 14:23:25 +02:00
time.c mips: time: Only compile the weak get_tbclk() when needed 2020-07-18 14:23:24 +02:00
u-boot-spl.lds mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds 2020-04-27 20:29:33 +02:00
u-boot.lds MIPS: optimize and fix ELF sections 2019-01-16 13:56:43 +01:00